ADF7010 datasheet(3/20 Pages) AD

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REV. 0

ADF7010

–3–

Parameter

Min

Typ

Max

Unit

PHASE-LOCKED LOOP

VCO Gain

MHz/V @ 915 MHz

Phase Noise (In-Band)

–80

dBc/Hz @ 5 kHz Offset

Phase Noise (Out of Band)

–100

dBc/Hz @ 1 MHz Offset

Spurious

100 kHz Loop BW

Integer Boundary

–55

dBc, 50 kHz Loop

Reference

–50

dBc

Harmonics

–14

dBc

Second Harmonic VDD = 3.0 V

–27

–18

dBc

Third Harmonic VDD = 3.0 V

–21

–18

dBc

All Other Harmonics

–35

dBc

REFERENCE INPUT

Crystal Reference

3.625

MHz

External Oscillator

3.625

MHz

Input Level, High Voltage

0.7

VDD

Input Level, Low Voltage

0.2

VDD

FREQUENCY COMPENSATION

Pull In Range of Register

100

ppm

PA CHARACTERISTICS

RF Output Impedance

High Range Amplifier

16 – j33

W, ZREF = 50 W

TIMING INFORMATION

Chip Enabled to Regulator Ready

200

Crystal Oscillator to CLKOUT OK

ms, 19.2 MHz Xtal

TEMPERATURE RANGE, TA

–40

+85

NOTES

1Operating temperature range is as follows: –40

∞C to +85∞C.

2 Frequency Deviation = (PFD Frequency

Mod Deviation )/2

12.

3 GFSK Frequency Deviation = (PFD Frequency

m )/212 where m = Mod Control.

4 V

DD = 3 V, PFD = 19.2 MHz, PA = 8 dBm

5 V

DD = 3 V, Loop Filter BW = 100 kHz

6 Measured >1 MHz away from integer channel. See Successful Design with ADF7010 Transmitter application note.

7 Not production tested. Based on characterization.

Specifications subject to change without notice.

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