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STHVDAC-253M

Theory of operation

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3.2

Operating modes

The following operating modes are accessible through the serial interface:

•

Shutdown mode:

The HVDAC is switched off, and all the blocks in the control ASIC

are switched off. Power consumption is almost zero in this mode, the DAC outputs are

pulled down. The shutdown mode is set by driving VIO to low level.

•

Active mode:

The HVDAC is switched on and the DAC outputs are fully controlled

through the RFFE serial interface. The DAC settings can be dynamically modified and

the HV outputs will be adjusted according to the specified timing diagrams. Each DAC

can be individually controlled and/or switched off according to application

requirements. Boost is active in this mode.The device is directly set into this mode after

startup (VIO supply switched on, or power mode bits set to 01b).

•

Low power mode:

The HVDAC is switched OFF except the RFFE interface. This

mode is set by driving PWR_MODE bits to 10b.

Figure 3. HVDAC state diagram

3.3

Device reset

Power-On Reset is implemented on the VIO supply input, ensuring the HVDAC will be reset

force all registers to their default value.

Soft Reset is also implemented as defined in the MIPI RFFE specification. Setting

PWR_MODE bits to 01b will force the device to reset all registers to their default value, and

switch into active mode.

STARTUP

(Registers reset to default)

SHUTDOWN

ACTIVE

LOW POWER

PWR_MODE = 0b00

PWR_MODE = 0b10

VIO

=

Low

VIO = High