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HT45F4N Datasheet(PDF) 80 Page - Holtek Semiconductor Inc |
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HT45F4N Datasheet(HTML) 80 Page - Holtek Semiconductor Inc |
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80 / 170 page ![]() Rev. 1.30 80 De�e��e� 1�� �01� Rev. 1.30 81 De�e��e� 1�� �01� HT45F4N/HT45FH4N Power Bank Flash MCU HT45F4N/HT45FH4N Power Bank Flash MCU TM0RP Register Bit 7 6 5 4 3 2 1 0 Na�e D7 D� D5 D� D3 D� D1 D0 R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 0 0 0 0 0 0 0 0 Bit7~0 TM0RP:TM0CCRPHighByteRegisterbit7~bit0 TM0CCRP8-bitregister,comparedwiththeTM0Counterbit15~bit8.Comparator PMatchPeriod 0:65536TM0clocks 1~255:256×(1~255)TM0clocks TheseeightbitsareusedtosetupthevalueontheinternalCCRP8-bitregister,which arethencomparedwiththeinternalcounter’shighesteightbits.Theresultofthis comparisoncanbeselectedtocleartheinternalcounteriftheT0CCLRbitissetto zero.SettingtheT0CCLRbittozeroensuresthatacomparematchwiththeCCRP valueswillresettheinternalcounter.AstheCCRPbitsareonlycomparedwiththe highesteightcounterbits,thecomparevaluesexistin256clockcyclemultiples. Clearingalleightbitstozeroisineffectallowingthecountertooverflowatits maximumvalue. Standard Type TM Operating Modes TheStandardTypeTMcanoperateinoneoffiveoperatingmodes,CompareMatchOutputMode, PWMOutputMode,SinglePulseOutputMode,CaptureInputModeorTimer/CounterMode.The operatingmodeisselectedusingtheT0M1andT0M0bitsintheTM0C1register. Compare Output Mode Toselectthismode,bitsT0M1andT0M0intheTM0C1register,shouldbesetto00respectively. Inthismodeoncethecounterisenabledandrunningitcanbeclearedbythreemethods.Theseare acounteroverflow,acomparematchfromComparatorAandacomparematchfromComparatorP. WhentheT0CCLRbitislow,therearetwowaysinwhichthecountercanbecleared.Oneiswhen acomparematchfromComparatorP,theotheriswhentheCCRPbitsareallzerowhichallows thecountertooverflow.HerebothT0AFandT0PFinterruptrequestflagsforComparatorAand ComparatorPrespectively,willbothbegenerated. IftheT0CCLRbitintheTM0C1registerishighthenthecounterwillbeclearedwhenacompare matchoccursfromComparatorA.However,hereonlytheT0AFinterruptrequestflagwillbe generatedevenifthevalueoftheCCRPbitsislessthanthatoftheCCRAregisters.Thereforewhen T0CCLRishighnoT0PFinterruptrequestflagwillbegenerated.IntheCompareMatchOutput Mode,theCCRAcannotbesetto“0”. Asthenameofthemodesuggests,afteracomparisonismade,theTMoutputpin,willchange state.TheTMoutputpinconditionhoweveronlychangesstatewhenaT0AFinterruptrequestflag isgeneratedafteracomparematchoccursfromComparatorA.TheT0PFinterruptrequestflag, generatedfromacomparematchoccursfromComparatorP,willhavenoeffectontheTMoutput pin.ThewayinwhichtheTMoutputpinchangesstatearedeterminedbytheconditionofthe T0IO1andT0IO0bitsintheTM0C1register.TheTMoutputpincanbeselectedusingtheT0IO1 andT0IO0bitstogohigh,togolowortotogglefromitspresentconditionwhenacomparematch occursfromComparatorA.TheinitialconditionoftheTMoutputpin,whichissetupafterthe T0ONbitchangesfromlowtohigh,issetupusingtheT0OCbit.NotethatiftheT0IO1andT0IO0 bitsarezerothennopinchangewilltakeplace. |
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