Load (A)

60

65

70

75

80

85

90

95

100

1m

10m

100m

1

2

D004

Load (A)

60

65

70

75

80

85

90

95

100

1m

10m

100m

1

2

D005

SW

IN

OUT

OUT

L

L

MAX

,

OUT

MAX

,

L

f

L

V

V

1

V

I

2

I

I

I

´

-

´

=

D

D

+

=

10

TLV62569, TLV62569P

SLVSDG1C – DECEMBER 2016 – REVISED OCTOBER 2017

www.ti.com

Product Folder Links: TLV62569 TLV62569P

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Copyright © 2016–2017, Texas Instruments Incorporated

8.2.2.4 Inductor Selection

The main parameters for inductor selection is inductor value and then saturation current of the inductor. To

calculate the maximum inductor current under static load conditions, Equation 3 is given:

where:

•

•

•

•

L is the inductor value

(3)

It is recommended to choose a saturation current for the inductor that is approximately 20% to 30% higher than

inductor.

8.2.2.5 Input and Output Capacitor Selection

The architecture of the TLV62569 allows use of tiny ceramic-type output capacitors with low equivalent series

resistance (ESR). These capacitors provide low output voltage ripple and are thus recommended. To keep its

resistance up to high frequencies and to achieve narrow capacitance variation with temperature, it is

recommended to use X7R or X5R dielectric.

The input capacitor is the low impedance energy source for the converter that helps provide stable operation. A

low ESR multilayer ceramic capacitor is recommended for best filtering. For most applications, 4.7-μF input

capacitance is sufficient; a larger value reduces input voltage ripple.

The TLV62569 is designed to operate with an output capacitor of 10 µF to 47 µF, as outlined in Table 4.

8.2.3 Application Performance Curves

Figure 6. 1.2-V Output Efficiency

Figure 7. 1.8-V Output Efficiency