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UCC24612-2DBVT Datasheet(PDF) 13 Page - Texas Instruments |
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UCC24612-2DBVT Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 40 page ![]() 13 UCC24612 www.ti.com SLUSCM5 – AUGUST 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Feature Description (continued) UCC24612, two different versions are created. UCC24612-1, the SR driver with inherent short turn on propagation delay (70 ns typical) can be used with the converter needs shorter delay, such as standard Flyback converter or Active Clamp Flyback covnerter using GaN MOSFET as main switches. UCC24612-2, the SR driver with added 150-ns turn on delay, to further ignore the leading edge spike, can be used with Active Clamp Flyback with Si based super junction MOSFET as the main switch or the LLC covnerters. When SR body diode is conducting, VD pin becomes negative to VS pin, by a body diode drop. The connection of VD and VS pin should be directly to the SR MOSFET pins, to avoid any overlapping of sensing paths to the power path, minimizing the negative voltage and ringing caused by the parasitic inductors. Low package inductance MOSFETs are preferred to minimize this effect. Besides the simple comparator, UCC24612 also includes a proportional driver for the SR. For normal SR controller, the SR MOSFET is turn on and off by the full driving voltage. This way, the conduction loss can be minimized. However, this method has couple major drawbacks. The turn off threshold is a fixed value, often, to prevent shoot through, the SR is turned off before current reaches zero. This causes the SR body diode conduction and actually increases the conduction loss. Another issue is associated with the converter operate in continuous conduction mode (CCM) condition. When Flyback converter operates in CCM, the SR current slope (di/dt) at turn off could be as high as 150A/µs. This high current slope could cause large negative current with long propagation delays. Furthermore, the delay caused by discharging SR MOSFET gate voltage to full voltage to its threshold level introduces another delay, this further increases the negative current. Instead of always turning off the SR MOSFET in full gate driver voltage, UCC24612 reduces its gate driver voltage when the voltage drop across SR drain to source becoming more than -50mV (current approaching zero). During this time, UCC24612 reduces its gate drive voltage and tries to regulate SR voltage drop to -50mV. This brings two major benefits to the application: a) Preventing the SR premature turning off, which causes extra loss associated with body diode conduction and reverse recovery b) Shorter turn off delay since the SR MOSFET gate is already reduced close to threshold level and SR can be turned off with virtually no delay from moving gate voltage. In certain applications, such as telecom DC/DC bricks, due to the lower input and output voltage, the converter operate in deep CCM mode (low inductor ripple) gives the benefit of less conduction loss. In these applications, the SR turn off current is high and the SR MOFET voltage drop can still be less than the -50-mV threshold. UCC24612 increases -50-mV threshold to -150 mV to force the proportion drive activated and reducing the gate driver voltage for fast turn off. The time to increase the threshold is based on previous cycle SR conduction time. Because the regular proportion drive and the turn off mechanism are kept functional all the time, the UCC24612 can still provide correct SR control even the large SR conduction time change with two switching cycles. The forced proportion drive mechanism can be shown in Figure 9. In Figure 9, the turn on delay was ignored to simplify the illustration. |
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