AD12400SLASHKIT datasheet(12/28 Pages) AD

12 / 28 page

AD12400

Rev. 0 | Page 12 of 28

Offset Error

The DC offset imposed on the input signal by the ADC,

reported in LSB (codes).

Pipeline Latency

The number of clock cycles that the output data will lag the

corresponding clock cycle.

Power Supply Rejection Ratio

The ratio of power supply voltage change to the resulting ADC

output voltage change.

Signal-to-Noise-and-Distortion (SINAD)

The ratio of the RMS signal amplitude (set 1 dB below full

scale) to the RMS value of the sum of all other spectral

components, including harmonics but excluding DC and image

spur.

Signal-to-Noise Ratio (SNR)

The ratio of the RMS signal amplitude (set at 1 dB below full

scale) to the RMS value of the sum of all other spectral

components, excluding the first five harmonics and DC.

Spurious-Free Dynamic Range (SFDR)

The ratio of the RMS signal amplitude to the RMS value of the

peak spurious spectral component, except the image spur. The

peak spurious component may or may not be a harmonic. May

be reported in dBc (i.e., degrades as signal level is lowered) or

dBFS (always related back to converter full-scale).

Two-Tone Intermodulation Distortion Rejection

The ratio of the RMS value of either input tone to the RMS

value of the worst third-order intermodulation product;

reported in dBc.

Two-Tone SFDR

The ratio of the RMS value of either input tone to the RMS

value of the peak spurious component. The peak spurious

component may or may not be an IMD product. May be

reported in dBc (i.e., degrades as signal level is lowered) or in

dBFS (always related back to converter full-scale).

AD12400/KIT Datasheet(PDF) 12 Page - Analog Devices