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LTC2413IGN Datasheet(PDF) 15 Page - Linear Technology |
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LTC2413IGN Datasheet(HTML) 15 Page - Linear Technology |
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15 / 44 page ![]() LTC2413 15 sn2413 2413fs While operating with an external conversion clock of a frequency fEOSC, the LTC2413 provides better than 110dB normal mode rejection in a frequency range fEOSC/2560 ±4%. The normal mode rejection as a function of the input frequency deviation from fEOSC/2560 is shown in Figure 5. Whenever an external clock is not present at the FO pin the converter automatically activates its internal oscillator and enters the Internal Conversion Clock mode. The LTC2413 operation will not be disturbed if the change of conversion clock source occurs during the sleep state or during the data output state while the converter uses an external serial clock. If the change occurs during the conversion state, the result of the conversion in progress may be outside specifications but the following conversions will not be affected. If the change occurs during the data output state and the converter is in the Internal SCK mode, the serial clock duty cycle may be affected but the serial data stream will remain valid. Table 3 summarizes the duration of each state and the achievable output data rate as a function of FO. SERIAL INTERFACE PINS The LTC2413 transmits the conversion results and re- ceives the start of conversion command through a syn- chronous 3-wire interface. During the conversion and sleep states, this interface can be used to assess the converter status and during the data output state it is used to read the conversion result. Table 3. LTC2413 State Duration State Operating Mode Duration CONVERT Internal Oscillator FO = LOW 147ms, Output Data Rate ≤ 6.8 Readings/s Simultaneous 50Hz/60Hz Rejection External Oscillator FO = External Oscillator 20510/fEOSCs, Output Data Rate ≤ fEOSC/20510 Readings/s with Frequency fEOSC kHz (fEOSC/2560 Rejection) SLEEP As Long As CS = HIGH Until CS = LOW and SCK DATA OUTPUT Internal Serial Clock FO = LOW As Long As CS = LOW But Not Longer Than 1.83ms (Internal Oscillator) (32 SCK cycles) FO = External Oscillator with As Long As CS = LOW But Not Longer Than 256/fEOSCms Frequency fEOSC kHz (32 SCK cycles) External Serial Clock with As Long As CS = LOW But Not Longer Than 32/fSCKms Frequency fSCK kHz (32 SCK cycles) Figure 5. LTC2413 Normal Mode Rejection When Using an External Oscillator of Frequency fEOSC APPLICATIO S I FOR ATIO DIFFERENTIAL INPUT SIGNAL FREQUENCY DEVIATION FROM NOTCH FREQUENCY fEOSC/2560(%) –12 –8 –4 048 12 2413 F05 –80 –85 –90 –95 –100 –105 –110 –115 –120 –125 –130 –135 –140 48 50 52 54 56 58 60 62 DIFFERENTIAL INPUT SIGNAL FREQUENCY (Hz) 2413 F04 –80 –90 –100 –100 –120 –130 –140 Figure 4. LTC2413 Normal Mode Rejection When Using an Internal Oscillator |
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