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LTC2413IGN Datasheet(PDF) 28 Page - Linear Technology

Part # LTC2413IGN
Description  24-Bit No Latency ADC, with Simultaneous 50Hz/60Hz Rejection
PDF  44 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC2413IGN Datasheet(HTML) 28 Page - Linear Technology

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LTC2413
28
sn2413 2413fs
APPLICATIO S I FOR ATIO
Figure 27 shows the typical INL error due to the source
resistance driving the REF+ or REF– pins when large CREF
values are used. The effect of the source resistance on the
two reference pins is additive with respect to this INL error.
In general, matching of source impedance for the REF+
and REF– pins does not help the gain or the INL error. The
user is thus advised to minimize the combined source
impedance driving the REF+ and REF– pins rather than to
try to match it.
The magnitude of the dynamic reference current depends
upon the size of the very stable internal sampling capaci-
tors and upon the accuracy of the converter sampling
clock. The accuracy of the internal clock over the entire
temperature and power supply range is typical better than
0.5%. Such a specification can also be easily achieved by
an external clock. When relatively stable resistors
(50ppm/
°C) are used for the external source impedance
seen by REF+ and REF–, the expected drift of the dynamic
current gain error will be insignificant (about 1% of its
value over the entire temperature and voltage range). Even
for the most stringent applications, a one-time calibration
operation may be sufficient.
In addition to the reference sampling charge, the reference
pins ESD protection diodes have a temperature dependent
leakage current. This leakage current, nominally 1nA
(
±10nA max), results in a small gain error. A 100Ω source
resistance will create a 0.05
µV typical and 0.5µV maxi-
mum full-scale error.
Figure 23. +FS Error vs RSOURCE at REF+ or REF– (Small CREF)
Figure 24. –FS Error vs RSOURCE at REF+ or REF– (Small CREF)
Figure 25. +FS Error vs RSOURCE at REF+ or REF– (Large CREF)
Figure 26. –FS Error vs RSOURCE at REF+ or REF– (Large CREF)
RSOURCE (Ω)
1.E+00
1.E+01
1.E+02
1.E+03
1.E+04
1.E+05
2413 F23
0
–10
–20
–30
–40
–50
VCC = 5V
REF+ = 5V
REF – = GND
IN+ = 5V
IN – = 2.5V
FO = GND
TA = 25°C
CREF = 0.01µF
CREF = 0.001µF
CREF = 100pF
CREF = 0pF
RSOURCE (Ω)
1.E+00
1.E+01
1.E+02
1.E+03
1.E+04
1.E+05
2413 F24
50
40
30
20
10
0
VCC = 5V
REF+ = 5V
REF – = GND
IN+ = GND
IN – = 2.5V
FO = GND
TA = 25°C
CREF = 0.01µF
CREF = 0.001µF
CREF = 100pF
CREF = 0pF
RSOURCE (Ω)
0 100 200 300 400 500 600 700 800 900 1000
2413 F25
0
–90
–180
–270
–360
–450
VCC = 5V
REF+ = 5V
REF– = GND
IN+ = 3.75V
IN – = 1.25V
FO = GND
TA = 25°C
CREF = 0.01µF
CREF = 0.1µF
CREF = 1µF, 10µF
RSOURCE (Ω)
0 100 200 300 400 500 600 700 800 900 1000
2413 F26
450
360
270
180
90
0
VCC = 5V
REF+ = 5V
REF– = GND
IN+ = 1.25V
IN – = 3.75V
FO = GND
TA = 25°C
CREF = 0.01µF
CREF = 0.1µF
CREF = 1µF, 10µF



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