LTC2413IGN datasheet(27/44 Pages) LINER

27 / 44 page

LTC2413

sn2413 2413fs

APPLICATIO S I FOR ATIO

Reference Current

In a similar fashion, the LTC2413 samples the differential

reference pins REF+ and REF– transfering small amount of

charge to and from the external driving circuits, thus

produces a dynamic reference current. This current does

not change the converter offset but it may degrade the gain

and INL performance. The effect of this current can be

analyzed in the same two distinct situations.

For relatively small values of the external reference capaci-

tors (CREF < 0.01µF), the voltage on the sampling capacitor

settles almost completely and relatively large values for

the source impedance result in only small errors. Such

values for CREF will deteriorate the converter offset and

gain performance without significant benefits of reference

filtering and the user is advised to avoid them.

Larger values of reference capacitors (CREF > 0.01µF) may

be required as reference filters in certain configurations.

Such capacitors will average the reference sampling charge

and the external source resistance will see a quasi con-

stant reference differential impedance. When internal os-

cillator is used (FO = LOW), the typical differential input

resistance is 1.43M

Ω which will generate a gain error of

approximately 0.35ppm for each ohm of source resis-

tance driving REF+ or REF–. When FO is driven by an

external oscillator with a frequency fEOSC (external conver-

sion clock operation), the typical differential reference

resistance is 0.20 • 1012/fEOSCΩ and each ohm of source

resistance drving REF+ or REF– will result in

2.47 • 10–6 • fEOSCppm gain error. The effect of the source

resistance on the two reference pins is additive with

respect to this gain error. The typical +FS and –FS errors

for various combinations of source resistance seen by the

REF+ and REF– pins and external capacitance CREF con-

nected to these pins are shown in Figures 23, 24, 25

and 26.

In addition to this gain error, the converter INL perfor-

mance is degraded by the reference source impedance.

When internal oscillator is used(FO = LOW), every 100Ω of

source impedance driving REF+ or REF– translates into

about 1.2ppm additional INL error. When FO is driven by

an external oscillator with a frequency fEOSC, every 100Ω

of source resistance driving REF+ or REF– translates into

about 8.73 • 10–6 • fEOSCppm additional INL error.

Figure 20. +FS Error vs RSOURCE at IN

+ or IN– (Large CIN)

Figure 21. –FS Error vs RSOURCE at IN+ or IN– (Large CIN)

Figure 22. Offset Error vs Common Mode Voltage

(VINCM = IN+ = IN–) and Input Source Resistance Imbalance

(

∆RIN = RSOURCEIN+ – RSOURCEIN–) for Large CIN Values (CIN ≥ 1µF)

RSOURCE (Ω)

0 100 200 300 400 500 600 700 800 900 1000

2413 F19

300

240

180

120

VCC = 5V

REF+ = 5V

REF – = GND

IN+ = 3.75V

IN– = 1.25V

FO = GND

TA = 25°C

CIN = 0.01µF

CIN = 0.1µF

CIN = 1µF, 10µF

RSOURCE (Ω)

0 100 200 300 400 500 600 700 800 900 1000

2413 F21

–60

–120

–180

–240

–300

VCC = 5V

REF+ = 5V

REF – = GND

IN+ = 1.25V

IN– = 3.75V

FO = GND

TA = 25°C

CIN = 0.01µF

CIN = 0.1µF

CIN = 1µF, 10µF

VINCM (V)

0.5

1.5

2.5

3.5

4.5

2413 F22

120

100

–20

–40

–60

–80

–100

–120

FO = GND

TA = 25°C

RSOURCEIN– = 500Ω

CIN = 10µF

VCC = 5V

REF+ = 5V

REF – = GND

IN+ = IN– = VINCM

∆RIN = +400Ω

∆RIN = +200Ω

∆RIN = +100Ω

∆RIN = 0Ω

∆RIN = –100Ω

∆RIN = –200Ω

∆RIN = –400Ω

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