SLG46121V datasheet(81/98 Pages) DIALOG

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000-0046121--106

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SLG46121

17.0 Appendix A - SLG46121 Register Definition

Address

Signal Function

reg<5:0>

Matrix Out: PIN3 Digital Output Source

reg<11:6>

Matrix Out: PIN4 Digital Output Source

reg<17:12>

Matrix Out: PIN5 Digital Output Source

reg<23:18>

Matrix Out: PIN6 Digital Output Source

reg<29:24>

Matrix Out: Output Enable of PIN6

reg<35:30>

Matrix Out: In0 of LUT2_0 or Clock Input of DFF0

reg<41:36>

Matrix Out: In1 of LUT2_0 or Data Input of DFF0

reg<47:42>

Matrix Out: In0 of LUT2_1 or Clock Input of DFF1

reg<53:48>

Matrix Out: In1 of LUT2_1 or Data Input of DFF1

reg<59:54>

Matrix Out: In0 of LUT2_2 or Clock Input of DFF2

reg<65:60>

Matrix Out: In1 of LUT2_2 1 or Data Input of DFF2

reg<71:66>

Matrix Out: In0 of LUT2_3 or Clock Input of DFF3

reg<77:72>

Matrix Out: In1 of LUT2_3 1 or Data Input of DFF3

reg<83:78>

Matrix Out: In0 of LUT2_4

reg<89:84>

Matrix Out: In1 of LUT2_4

reg<95:90>

Matrix Out: In0 of Inverter INV_0

reg<101:96>

Matrix Out: PIN12 Digital Output Source

reg<107:102>

Matrix Out: In0 of LUT3_0 or Clock Input of DFF4

reg<113:108>

Matrix Out: In1 of LUT3_0 or Data Input of DFF4

reg<119:114>

Matrix Out: In2 of LUT3_0 or Resetb Input of DFF4

reg<125:120>

Matrix Out: In0 of LUT3_1 or Clock Input of DFF5

reg<131:126>

Matrix Out: In1 of LUT3_1 or Data Input of DFF5

reg<137:132>

Matrix Out: In2 of LUT3_1 or Resetb(Setb) of DFF5

reg<143:138>

Matrix Out: In0 of LUT3_2 or Clock Input of DFF6

reg<149:144>

Matrix Out: In1 of LUT3_2 or Data Input of DFF6

reg<155:150>

Matrix Out: In2 of LUT3_2 or Resetb Input of DFF6

reg<161:156>

Matrix Out: In0 of LUT3_3 or Clock Input of DFF7

reg<167:162>

Matrix Out: In1 of LUT3_3 or Data Input of DFF7

reg<173:168>

Matrix Out: In2 of LUT3_3 or Resetb(Setb) of DFF7

reg<179:174>

Matrix Out: In0 of LUT3_4

reg<185:180>

Matrix Out: In1 of LUT3_4

reg<191:186>

Matrix Out: In2 of LUT3_4

reg<197:192>

Matrix Out: In0 of LUT3_5

reg<203:198>

Matrix Out: In1 of LUT3_5

reg<209:204>

Matrix Out: In2 of LUT3_5

reg<215:210>

Matrix Out: In0 of LUT3_6

reg<221:216>

Matrix Out: In1 of LUT3_6

reg<227:222>

Matrix Out: In2 of LUT3_6

reg<233:228>

Matrix Out: In0 of LUT3_7

reg<239:234>

Matrix Out: In1 of LUT3_7

reg<245:240>

Matrix Out: In2 of LUT3_7

SLG46121V Datasheet(PDF) 81 Page - Dialog Semiconductor

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