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HT85F2240 Datasheet(PDF) 4 Page - Holtek Semiconductor Inc |
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HT85F2240 Datasheet(HTML) 4 Page - Holtek Semiconductor Inc |
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4 / 147 page ![]() Rev. 1.10 4 of 147 ���� �1� �01� A/D Flash 8051 Core Low Pin Count MCU HT85F2230/HT85F2240 23 Reset and Initialisation....................................................................................... 67 Reset Overview................................................................................................................. 67 Reset Operations .............................................................................................................. 68 Reset So�rce Register – RSTSRC............................................................................................... 68 Power-on Reset............................................................................................................................ 69 RESET Pin Reset......................................................................................................................... 70 Low Vo�tage Reset – LVR............................................................................................................. 71 Watchdog Reset .......................................................................................................................... 7� Software Resets ........................................................................................................................... 7� SRST Register Software Reset.................................................................................................... 7� WDTCR Register Software Reset ................................................................................................ 7� LVRCR Register Software Reset.................................................................................................. 74 Reset Initia� Conditions...................................................................................................... 74 24 Interrupts............................................................................................................. 79 Interr�pt Registers............................................................................................................. 79 Interr�pt Operation ............................................................................................................ 8� Interr�pt Priorit�................................................................................................................. 86 Priorit� Leve�s............................................................................................................................... 86 Priorit� Contro� Registers.............................................................................................................. 87 Externa� Interr�pt............................................................................................................... 90 A/D Converter Interr�pt ..................................................................................................... 90 Timer/Co�nter Interr�pt ..................................................................................................... 90 Time Base Interr�pts ......................................................................................................... 91 LVD Interr�pt ..................................................................................................................... 9� Interr�pt Wake-�p F�nction............................................................................................... 9� Programming Considerations............................................................................................ 9� 25 Input/Output Ports.............................................................................................. 94 Inp�t/O�tp�t Port Overview............................................................................................... 94 Register Description.......................................................................................................... 9� PnM0/PnM1 Registers – Port Mode Registers............................................................................. 96 P0WAKE Register – Port 0 Wake-�p ........................................................................................... 98 SRCR Register – S�ew Rate Contro�............................................................................................ 99 Pin-remapping F�nction .................................................................................................... 99 PRM Register – Pin-remapping Contro� Register......................................................................... 99 I/O Pin Str�ct�res............................................................................................................ 100 Q�asi-bidirectiona� I/O ............................................................................................................... 100 P�sh-p��� O�tp�t ........................................................................................................................ 101 Open-drain O�tp�t ..................................................................................................................... 101 Inp�t On�� .................................................................................................................................. 101 Programming Considerations.......................................................................................... 10� |
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