 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
PIC18F4539-E/MLSQTP Datasheet(PDF) 31 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
PIC18F4539-E/MLSQTP Datasheet(HTML) 31 Page - Microchip Technology |
|
|
31 / 322 page  2002 Microchip Technology Inc. Preliminary DS30485A-page 29 PIC18FXX39 IPR2 2439 4439 2539 4539 ---1 1111 ---1 1111 ---u uuuu PIR2 2439 4439 2539 4539 ---0 0000 ---0 0000 ---u uuuu(3) PIE2 2439 4439 2539 4539 ---0 0000 ---0 0000 ---u uuuu IPR1 2439 4439 2539 4539 1111 1111 1111 1111 uuuu uuuu 2439 4439 2539 4539 -111 1111 -111 1111 -uuu uuuu PIR1 2439 4439 2539 4539 0000 0000 0000 0000 uuuu uuuu(3) 2439 4439 2539 4539 -000 0000 -000 0000 -uuu uuuu(3) PIE1 2439 4439 2539 4539 0000 0000 0000 0000 uuuu uuuu 2439 4439 2539 4539 -000 0000 -000 0000 -uuu uuuu TRISE 2439 4439 2539 4539 0000 -111 0000 -111 uuuu -uuu TRISD 2439 4439 2539 4539 1111 1111 1111 1111 uuuu uuuu TRISC* 2439 4439 2539 4539 1111 1111 1111 1111 uuuu uuuu TRISB 2439 4439 2539 4539 1111 1111 1111 1111 uuuu uuuu TRISA(5,6) 2439 4439 2539 4539 -111 1111(5) -111 1111(5) -uuu uuuu(5) LATE 2439 4439 2539 4539 ---- -xxx ---- -uuu ---- -uuu LATD 2439 4439 2539 4539 xxxx xxxx uuuu uuuu uuuu uuuu LATC* 2439 4439 2539 4539 xxxx xxxx uuuu uuuu uuuu uuuu LATB 2439 4439 2539 4539 xxxx xxxx uuuu uuuu uuuu uuuu LATA(5,6) 2439 4439 2539 4539 -xxx xxxx(5) -uuu uuuu(5) -uuu uuuu(5) PORTE 2439 4439 2539 4539 ---- -000 ---- -000 ---- -uuu PORTD 2439 4439 2539 4539 xxxx xxxx uuuu uuuu uuuu uuuu PORTC* 2439 4439 2539 4539 xxxx xxxx uuuu uuuu uuuu uuuu PORTB 2439 4439 2539 4539 xxxx xxxx uuuu uuuu uuuu uuuu PORTA(5,6) 2439 4439 2539 4539 -x0x 0000(5) -u0u 0000(5) -uuu uuuu(5) TABLE 3-3: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED) Register Applicable Devices Power-on Reset, Brown-out Reset MCLR Resets WDT Reset RESET Instruction Stack Resets Wake-up via WDT or Interrupt Legend: u = unchanged, x = unknown, - = unimplemented bit, read as '0', q = value depends on condition. Shaded cells indicate conditions do not apply for the designated device. * These registers are retained to maintain compatibility with PIC18FXX2 devices; however, one or more bits are reserved. Users should not modify the value of these bits. See Section 4.9.2 for details. Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack. 2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector (0008h or 0018h). 3: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up). 4: See Table 3-2 for RESET value for specific condition. 5: Bit 6 of PORTA, LATA, and TRISA are enabled in ECIO and RCIO Oscillator modes only. In all other Oscillator modes, they are disabled and read ‘0’. 6: Bit 6 of PORTA, LATA and TRISA are not available on all devices. When unimplemented, they are read ‘0’. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
