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P89LPC904FD Datasheet(PDF) 5 Page - NXP Semiconductors |
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P89LPC904FD Datasheet(HTML) 5 Page - NXP Semiconductors |
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5 / 41 page ![]() Philips Semiconductors P89LPC904 8-bit microcontrollers with two-clock accelerated 80C51 core Preliminary data Rev. 02 — 25 June 2004 5 of 41 9397 750 13521 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. 5. Pinning information 5.1 Pinning 5.2 Pin description Fig 2. P89LPC904 pinning (SO8). VDD VSS AD11/P0.2/CIN2A/KBI2 P0.4/CIN1A/AD13/DAC1 P1.1/RxD P0.5/CMPREF/CLKIN RST/P1.5 P1.0/TxD 002aaa780 1 2 3 4 6 5 8 7 Table 3: P89LPC904 pin description Symbol Pin Type Description P0.0 to P0.6 2, 6, 7 I/O Port 0: Port 0 is an I/O port with a user-configurable output type. During reset Port 0 latches are configured in the input only mode with the internal pull-up disabled. The operation of Port 0 pins as inputs and outputs depends upon the port configuration selected. Each port pin is configured independently. Refer to Section 8.13.1 “Port configurations” and Table 8 “DC electrical characteristics” for details. The Keypad Interrupt feature operates with Port 0 pins. All pins have Schmitt triggered inputs. Port 0 also provides various special functions as described below: 2 I/O P0.2 — Port 0 bit 2. I CIN2A — Comparator 2 positive input. I KBI2 — Keyboard input 2. I AD11 — ADC1 channel 1 analog input. 7 I/O P0.4 — Port 0 bit 4. I CIN1A — Comparator 1 positive input. I AD13 — ADC1 channel 3 analog input. O DAC1 — Digital to analog converter output. 6 I/O P0.5 — Port 0 bit 5. I CMPREF — Comparator reference (negative) input. I CLKIN — External clock input. |
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