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SAFC161RI Datasheet(PDF) 38 Page - Siemens Semiconductor Group |
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SAFC161RI Datasheet(HTML) 38 Page - Siemens Semiconductor Group |
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38 / 60 page ![]() Semiconductor Group 38 1998-05-01 C161RI AC Characteristics Definition of Internal Timing The internal operation of the C161RI is controlled by the internal CPU clock f CPU. Both edges of the CPU clock can trigger internal (e.g. pipeline) or external (e.g. bus cycles) operations. The specification of the external timing (AC Characteristics) therefore depends on the time between two consecutive edges of the CPU clock, called “TCL” (see figure below). Figure 10 Generation Mechanisms for the CPU Clock The CPU clock signal can be generated via different mechanisms. The duration of TCLs and their variation (and also the derived external timing) depends on the used mechanism to generate f CPU. This influence must be regarded when calculating the timings for the C161RI. The used mechanism to generate the CPU clock is selected during reset via the logic levels on pins P0.15-13 (P0H.7-5). TCL TCL fCPU fXTAL Direct Clock Drive TCL TCL fCPU fXTAL Prescaler Operation |
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