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EM78P257 Datasheet(PDF) 33 Page - ELAN Microelectronics Corp |
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EM78P257 Datasheet(HTML) 33 Page - ELAN Microelectronics Corp |
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33 / 91 page ![]() EM78P257 OTP ROM This specification is subject to change without prior notice. 07.27.2004 (V1.4) 33 • Bit 7 of the IOCE0 register is set to "1", and the others are cleared. • RF and IOCF0 register are cleared. The sleep (power down) mode is attained by executing the “SLEP” instruction. While entering sleep mode, WDT (if enabled) is cleared but keeps on running. The controller can be awakened by (1) external reset input on /RESET pin. (2) WDT time-out (if enabled). (3) Port 5 input status changed (if enabled). (4) Comparator status changed. The first two cases will cause the EM78P257A/B to reset. The T and P flags of R3 can be used to determine the source of the reset (wake-up). Case 3 is considered the continuation of program execution and the global interrupt ("ENI" or "DISI" being executed) decides whether or not the controller branches to the interrupt vector following wake-up. If ENI is executed before SLEP, the instruction will begin to execute from the address 3FEH after wake-up. If DISI is executed before SLEP, the operation will restart from the instruction right next to SLEP after wake-up. Only one of Cases 2 and 3 can be enabled before entering the sleep mode. That is, [a] if Port 5 input status changed interrupt is enabled before SLEP , WDT must be disabled by software. However, the WDT bit in the option register remains enabled. Hence, the EM78P257A/B can be awakened only by Case 1 or 3. Similarly, the same procedures should be applied if comparator status change interrupt is used. The device can be awakened only by Case 1 or 4. [b] if WDT is enabled before SLEP, Port 5 Input Status Change Interrupt must be disabled. Hence, the EM78P257A/B can be awakened only by Case 1 or 2. Refer to the section on Interrupt. If Port 5 Input Status Change Interrupt is used to wake-up the EM78P257A/B, the following instructions must be executed before SLEP: MOV A, @xx000110b ; Select internal TCC clock CONTW CLR R1 ; Clear TCC and prescaler MOV A, @xxxx1110b ; Select WDT prescaler CONTW WDTC ; Clear WDT and prescaler MOV A, @0xxxxxxxb ; Disable WDT IOW RE MOV R5, R5 ; Read Port 5 MOV A, @00000x1xb ; Enable Port 5 input change interrupt IOW RF ENI (or DISI) ; Enable (or disable) global interrupt SLEP ; Sleep NOP |
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