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EM78P257 Datasheet(PDF) 55 Page - ELAN Microelectronics Corp |
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EM78P257 Datasheet(HTML) 55 Page - ELAN Microelectronics Corp |
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55 / 91 page ![]() EM78P257 OTP ROM This specification is subject to change without prior notice. 07.27.2004 (V1.4) 55 0x01 TCC/R1 TCC7 TCC6 TCC5 TCC4 TCC3 TCC2 TCC1 TCC0 0X09 TCCSR/R9 CMPOUT4 CMPOUT3 CMPOUT2 CMPOUT1 0 TCCCIF TCCBIF TCCAIF 0X05 TCCA/IOC51 TCCA7 TCCA6 TCCA5 TCCA4 TCCA3 TCCA2 TCCA1 TCCA0 0x06 TCCBL/IOC61 TCCB7 TCCB6 TCCB5 TCCB4 TCCB3 TCCB2 TCCB1 TCCB0 • TCCA: An eight-bit time clock/counter A. In MOUSE mode, it will load X-axis data into TCCA, it is defined as an increment/decrement counter. • TCCB: An eight-bit time clock/counter B. In MOUSE mode, it will load Y-axis data into TCCB, it is defined as an increment/decrement counter. • TCCC: An eight-bit time clock/counter C. In MOUSE mode, it will load Z-axis data into TCCC, it is defined as an increment/decrement counter. Table 23 TCCX Status Register (1) 7 6 5 4 3 2 1 0 - - - - - TCCAIE TCCATS TCCATE • Bit 7~Bit 3 Not used, read as ‘0’. • Bit 2(TCCAIE) TCCAIF interrupt enable bit. 0: disable TCCAIF interrupt 1: enable TCCAIF interrupt • Bit 1(TCCATS) TCCA signal source 0: internal instruction cycle clock 1: transition on the TCC1 pin • Bit 0(TCCATE) TCCA signal edge 0: increment if the transition from low to high (leading edge) takes place on the TCC2 pin 1: increment if the transition from high to low (leading edge) takes place on the TCC2 pin Table 24 TCCX Status Register (2) 7 6 5 4 3 2 1 0 - TCCBIE TCCBTS TCCBTE - TCCCIE TCCCTS TCCCTE • Bit 7 Not used. • Bit 6(TCCBIE) TCCBIF interrupt enable bit. 0: disable the TCCBIF interrupt 1: enable the TCCBIF interrupt • Bit 5(TCCBTS) TCCB signal source 0: internal instruction cycle clock 1: transition on the TCC3 pin • Bit 4(TCCBTE) TCCB signal edge 0: increment if the transition from low to high (leading edge) takes place on the TCC4 pin 1: increment if the transition from high to low (leading edge) takes place on the TCC4 pin |
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