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IPAC-X Datasheet(PDF) 52 Page - Infineon Technologies AG

Part # IPAC-X
Description  ISDN PC Adapter Circuit
PDF  270 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

IPAC-X Datasheet(HTML) 52 Page - Infineon Technologies AG

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IPAC-X
PSB/PSF 21150
Description of Functional Blocks
Data Sheet
52
2003-01-30
3.3.2
S/T-Interface Multiframing
According to ITU recommendation I.430 a multi-frame provides extra layer 1 capacity in
the TE-to-NT direction by using an extra channel between the TE and NT (Q-channel).
The Q bits are defined to be the bits in the F
A bit position.
In the NT-to-TE direction the S-channel bits are used for information transmission. One
S channel (S1) out of five possible S-channels can be accessed by the IPAC-X.
In the NT-to-TE direction the S-channel bits are used for information transmission.
The S and Q channels are accessed via the µC interface or the IOM-2 MONITOR
channel, respectively, by reading/writing the SQR or SQX bits in the S/Q channel
registers (SQRRx, SQXRx).
Table 8 shows the S and Q bit positions within the multi-frame.
Table 8
S/Q-Bit Position Identification and Multi-Frame Structure
Frame Number
NT-to-TE
F
A Bit Position
NT-to-TE
M Bit
NT-to-TE
S Bit
TE-to-NT
F
A Bit Position
1
2
3
4
5
ONE
ZERO
ZERO
ZERO
ZERO
ONE
ZERO
ZERO
ZERO
ZERO
S11
S21
S31
S41
S51
Q1
ZERO
ZERO
ZERO
ZERO
6
7
8
9
10
ONE
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
S12
S22
S32
S42
S52
Q2
ZERO
ZERO
ZERO
ZERO
11
12
13
14
15
ONE
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
S13
S23
S33
S43
S53
Q3
ZERO
ZERO
ZERO
ZERO
16
17
18
19
20
ONE
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
S14
S24
S34
S44
S54
Q4
ZERO
ZERO
ZERO
ZERO
1
2
ONE
ZERO
ONE
ZERO
S11
S21
Q1
ZERO



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