ISL6441 datasheet(10/19 Pages) RENESAS

10 / 19 page

ISL6441

FN9197 Rev 3.00

Page 10 of 19

May 26, 2009

Pin Descriptions

BOOT2, BOOT1 - These pins power the upper MOSFET

drivers of each PWM converter. Connect this pin to the

junction of the bootstrap capacitor (CBOOT) and the

cathode of the bootstrap diode. The anode of the bootstrap

diode is connected to the VCC_5V pin. It’s highly

recommended to add a 5.1

 resistor in series with CBOOT

and another 5.1

 resistor in series with the bootstrap diode

to prevent the overcharge of CBOOT which may cause

overvoltage failure between BOOT and PHASE pin (Figure

15). Refer to “Gate Drivers” on page 12 for detailed

descriptions.

UGATE2, UGATE1 - These pins provide the gate drive for

the upper MOSFETs.

PHASE2, PHASE1 - These pins are connected to the

junction of the upper MOSFET’s source, output filter inductor

and lower MOSFETs drain. A small RC snubber is

suggested to be added at the phase node of the MOSFETs

to improve the system EMI performance. A typical snubber

suggested is 2.2W and 680pF.

LGATE2, LGATE1 - These pins provide the gate drive for

the lower MOSFETs.

PGND - This pin provides the power ground connection for

the lower gate drivers for both PWM1 and PWM2. This pin

should be connected to the sources of the lower MOSFETs

and the (-) terminals of the external input capacitors.

FB3, FB2, FB1 - These pins are connected to the feedback

resistor divider and provide the voltage feedback signals for

the respective controller. They set the output voltage of the

converter. In addition, the PGOOD circuit uses these inputs

to monitor the output voltage status.

ISEN2, ISEN1 - These pins are used to monitor the voltage

drop across the lower MOSFET for current loop feedback

and overcurrent protection.

PGOOD - This is an open drain logic output used to indicate

the status of the output voltages. This pin is pulled low when

either of the two PWM outputs is not within 10% of the

respective nominal voltage, or if the linear controller output is

less than 75% of it’s nominal value.

SGND - This is the small-signal ground, common to all 3

controllers, and must be routed separately from the high

current ground (PGND). All voltage levels are measured with

respect to this pin. Connect the additional SGND pins to this

pin. A small ceramic capacitor should be connected right

next to this pin for noise decoupling.

VIN - Use this pin to power the device with an external

supply voltage with a range of 5.6V to 24V. For 5V ±10%

operation, connect this pin to VCC_5V.

VCC_5V - This pin is the output of the internal 5V linear

regulator. This output supplies the bias for the IC, the low

side gate drivers, and the external boot circuitry for the high

side gate drivers. The IC may be powered directly from a

single 5V (±10%) supply at this pin. When used as a 5V

supply input, this pin must be externally connected to VIN.

The VCC_5V pin must be always decoupled to power

ground with a minimum of 4.7µF ceramic capacitor, placed

very close to the pin.

SYNC - This pin may be used to synchronize two or more

ISL6441 controllers. This pin requires a 1k resistor to ground

if used; connect directly to VCC_5V if not used.

SS1, SS2 - These pins provide a soft-start function for their

respective PWM controllers. When the chip is enabled, the

regulated 5µA pull-up current source charges the capacitor

connected from this pin to ground. The error amplifier

reference voltage ramps from 0V to 0.8V while the voltage

on the soft-start pin ramps from 0V to 0.8V.

SD1, SD2 - These pins provide an enable/disable function

for their respective PWM output. The output is enabled when

this pin is floating or pulled HIGH, and disabled when the pin

is pulled LOW.

GATE3 - This pin is the open drain output of the linear

regulator controller.

OCSET2, OCSET1 - A resistor from this pin to ground sets

the overcurrent threshold for the respective PWM.

Functional Description

General Description

The ISL6441 integrates control circuits for two synchronous

buck converters and one linear controller. The two

synchronous bucks operate out-of-phase to substantially

reduce the input ripple and thus reduce the input filter

requirements. The chip has four control lines (SS1, SD1,

SS2, and SD2), which provide independent control for each

of the synchronous buck outputs.

The buck PWM controllers employ a free-running frequency

of 1.4MHz. The current mode control scheme with an input

voltage feed-forward ramp input to the modulator provides

excellent rejection of input voltage variations and provides

simplified loop compensations.

The linear controller can drive either a PNP or PFET to

provide ultra low-dropout regulation with programmable

voltages.

Internal 5V Linear Regulator (VCC_5V)

All ISL6441 functions are internally powered from an

on-chip, low dropout 5V regulator. The maximum regulator

input voltage is 24V. Bypass the regulator’s output

(VCC_5V) with a 4.7µF capacitor to ground. The dropout

voltage for this LDO is typically 600mV, so when VCC_5V is

greater than 5.6V, VCC_5V is typically 5V. The ISL6441 also

employs an undervoltage lockout circuit that disables both

regulators when VCC_5V falls below 4.4V.

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