ISL6566ACR datasheet(13/29 Pages) RENESAS

13 / 29 page

ISL6566A

FN9200 Rev 2.00

Page 13 of 29

Jul 27, 2005

Voltage Regulation

In order to regulate the output voltage to a specified level,

the ISL6566A uses the integrating compensation network

shown in Figure 6. This compensation network insures that

the steady-state error in the output voltage is limited only to

the error in the reference voltage (output of the DAC) and

offset errors in the OFS current source, remote-sense and

error amplifiers. Intersil specifies the guaranteed tolerance of

the ISL6566A to include the combined tolerances of each of

these elements.

The ISL6566A incorporates an internal differential remote-

sense amplifier in the feedback path. The amplifier removes

the voltage error encountered when measuring the output

voltage relative to the controller ground reference point,

resulting in a more accurate means of sensing output

voltage. Connect the microprocessor sense pins to the non-

inverting input, VSEN, and inverting input, RGND, of the

remote-sense amplifier. The droop voltage, VDROOP, also

feeds into the remote-sense amplifier. The remote-sense

output, VDIFF, is therefore equal to the sum of the output

voltage, VOUT, and the droop voltage. VDIFF is connected to

the inverting input of the error amplifier through an external

resistor.

The output of the error amplifier, VCOMP, is compared to the

sawtooth waveform to generate the PWM signals. The PWM

signals control the timing of the Internal MOSFET drivers

and regulate the converter output so that the voltage at FB is

equal to the voltage at REF. This will regulate the output

voltage to be equal to Equation 4. The internal and external

circuitry that controls voltage regulation is illustrated in

Figure 6.

Load-Line (Droop) Regulation

Some microprocessor manufacturers require a precisely-

controlled output impedance. This dependence of output

voltage on load current is often termed “droop” or “load line”

regulation.

As shown in Figure 6, a voltage, VDROOP, proportional to the

total current in all active channels, IOUT, feeds into the

differential remote-sense amplifier. The resulting voltage at

the output of the remote-sense amplifier is the sum of the

output voltage and the droop voltage. As Equation 4 shows,

feeding this voltage into the compensation network causes

the regulator to adjust the output voltage so that it’s equal to

the reference voltage minus the droop voltage.

The droop voltage, VDROOP, is created by sensing the

current through the output inductors. This is accomplished

by using a continuous DCR current sensing method.

Inductor windings have a characteristic distributed

resistance or DCR (Direct Current Resistance). For

simplicity, the inductor DCR is considered as a separate

lumped quantity, as shown in Figure 7. The channel current,

IL, flowing through the inductor, passes through the DCR.

Equation 5 shows the s-domain equivalent voltage, VL,

across the inductor.

The inductor DCR is important because the voltage dropped

across it is proportional to the channel current. By using a

simple R-C network and a current sense amplifier, as shown

1.4375

1.4500

1.4625

1.4750

1.4875

1.5000

1.5125

1.5250

1.5375

1.5500

1.5625

1.5750

1.5875

1.6000

TABLE 4. VRM10 VOLTAGE IDENTIFICATION CODES (Continued)

VID4

VID3

VID2

VID1

VID0

VID12.5

VDAC

FIGURE 6. OUTPUT VOLTAGE AND LOAD-LINE

REGULATION WITH OFFSET ADJUSTMENT

IOFS

EXTERNAL CIRCUIT

ISL6566A INTERNAL CIRCUIT

COMP

RFB

VDIFF

VSEN

RGND

VOFS

ERROR AMPLIFIER

DIFFERENTIAL

REMOTE-SENSE

AMPLIFIER

VCOMP

REF

CREF

VID DAC

IREF

ICOMP

VDROOP

VOUT

VREF VOFS

–

VDROOP

–

(EQ. 4)

VL s



IL sL DCR







(EQ. 5)

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