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ISL6566ACR Datasheet(PDF) 14 Page - Renesas Technology Corp

Part # ISL6566ACR
Description  Three-Phase Buck PWM Controller with Two Integrated MOSFET Drivers and One External Driver Signal
PDF  29 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ISL6566ACR Datasheet(HTML) 14 Page - Renesas Technology Corp

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ISL6566A
FN9200 Rev 2.00
Page 14 of 29
Jul 27, 2005
in Figure 7, the voltage drop across all of the inductors DCRs
can be extracted. The output of the current sense amplifier,
VDROOP, can be shown to be proportional to the channel
currents IL1, IL2, and IL3, shown in Equation 6.
If the R-C network components are selected such that the
R-C time constant matches the inductor L/DCR time
constant, then VDROOP is equal to the sum of the voltage
drops across the individual DCRs, multiplied by a gain. As
Equation 7 shows, VDROOP is therefore proportional to the
total output current, IOUT.
By simply adjusting the value of RS, the load line can be set
to any level, giving the converter the right amount of droop at
all load currents. It may also be necessary to compensate for
any changes in DCR due to temperature. These changes
cause the load line to be skewed, and cause the R-C time
constant to not match the L/DCR time constant. If this
becomes a problem a simple negative temperature
coefficient resistor network can be used in the place of
RCOMP to compensate for the rise in DCR due to
temperature.
Note: An optional 10nF ceramic capacitor from the ISUM pin
to the IREF pin is recommended to help reduce any noise
affects on the current sense amplifier due to layout.
Output-Voltage Offset Programming
The ISL6566A allows the designer to accurately adjust the
offset voltage by connecting a resistor, ROFS, from the OFS
pin to VCC or GND. When ROFS is connected between OFS
and VCC, the voltage across it is regulated to 1.5V. This
causes a proportional current (IOFS) to flow into the OFS pin
and out of the FB pin. If ROFS is connected to ground, the
voltage across it is regulated to 0.5V, and IOFS flows into the
FB pin and out of the OFS pin. The offset current flowing
through the resistor between VDIFF and FB will generate the
desired offset voltage which is equal to the product (IOFS x
RFB). These functions are shown in Figures 8 and 9.
VDROOP s

sL
DCR
------------- 1
+


sRCOMP CCOMP

1
+

--------------------------------------------------------------------------
RCOMP
RS
-----------------------
IL1 IL2 IL3
++
 DCR

=
(EQ. 6)
VDROOP
RCOMP
RS
--------------------- IOUT DCR

=
(EQ. 7)
FIGURE 7. DCR SENSING CONFIGURATION
ICOMP
RS
DCR
L
INDUCTOR
VOUT
COUT
IL3
VL(s)
DCR
L
INDUCTOR
DCR
L
INDUCTOR
PHASE3
PHASE2
PHASE1
IL2
IL1
RS
RS
RCOMP
CCOMP
ISUM
IREF
ISL6566A
-
+
VDROOP
IOUT
(optional)
To External Driver
PHASE Pin
E/A
FB
OFS
VCC
GND
+
-
+
-
0.5V
1.5V
GND
ROFS
RFB
VDIFF
ISL6566A
FIGURE 8. POSITIVE OFFSET OUTPUT VOLTAGE
PROGRAMMING
VREF
VOFS
+
-
IOFS



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