IMX6SLLCEC datasheet(74/90 Pages) NXP

74 / 90 page

i.MX 6SLL Applications Processors for Consumer Products, Rev. 0.2, 11/2017

NXP Semiconductors

Package Information and Contact Assignments

DRAM_D3

AB1

DRAM

DDR

ALT0

DRAM_D[3]

Input

(100K)

DRAM_D30

DRAM

DDR

ALT0

DRAM_D[30]

Input

(100K)

DRAM_D31

DRAM

DDR

ALT0

DRAM_D[31]

Input

(100K)

DRAM_D4

AA3

DRAM

DDR

ALT0

DRAM_D[4]

Input

(100K)

DRAM_D5

DRAM

DDR

ALT0

DRAM_D[5]

Input

(100K)

DRAM_D6

DRAM

DDR

ALT0

DRAM_D[6]

Input

(100K)

DRAM_D7

DRAM

DDR

ALT0

DRAM_D[7]

Input

(100K)

DRAM_D8

DRAM

DDR

ALT0

DRAM_D[8]

Input

(100K)

DRAM_D9

DRAM

DDR

ALT0

DRAM_D[9]

Input

(100K)

DRAM_DQM0

DRAM

DDR

ALT0

DRAM_DQM[0]

Output

(100K)

DRAM_DQM1

DRAM

DDR

ALT0

DRAM_DQM[1]

Output

(100K)

DRAM_DQM2

AB3

DRAM

DDR

ALT0

DRAM_DQM[2]

Output

(100K)

DRAM_DQM3

DRAM

DDR

ALT0

DRAM_DQM[3]

Output

(100K)

DRAM_SDCKE0

DRAM

DDR

ALT0

DRAM_SDCKE[0]

Output

(100K)

DRAM_SDCKE1

DRAM

DDR

ALT0

DRAM_SDCKE[1]

Output

(100K)

DRAM_SDCLK_0

DRAM

DDRCL

ALT0

DRAM_SDCLK[0]

Input

Hi-Z

(100K)

DRAM_SDCLK_0_B

DRAM

—

DRAM_SDQS0

DRAM

DDRCL

ALT0

DRAM_SDQS[0]

Input

Hi-Z

Not

connected

DRAM_SDQS0_B

DRAM

—

Table 63. 13 x 13 mm Functional Contact Assignments (continued)

Ball Name

Ball

Power Group1

Ball

Type

Out of Reset Condition2

During

Reset

Condition

Default

Mode

(Reset

Mode)

Default Function

Input /

Output

Value3

IMX6SLLCEC Datasheet(PDF) 74 Page - NXP Semiconductors

IMX6SLLCEC Datasheet(HTML) 74 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90

Datasheet Download

Link URL