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LPC804 Datasheet(PDF) 8 Page - NXP Semiconductors |
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LPC804 Datasheet(HTML) 8 Page - NXP Semiconductors |
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8 / 81 page ![]() LPC804 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved. Product data sheet Rev. 1.3 — 23 March 2018 8 of 81 NXP Semiconductors LPC804 32-bit Arm Cortex-M0+ microcontroller Fig 6. Pin configuration TSSOP24 - 2 package with VDDIO (LPC804M111JDH20 - dual supply device) PIO0_18 PIO0_19/DACOUT PIO0_16/ACMP_I4/ADC_3 PIO0_14/ACMP_I3/ADC_2 VDDIO PIO0_0/ACMP_I1/TDO PIO0_13/ADC_10 VREFP PIO0_12 PIO0_7/ADC_1/ACMPVREF RESET/PIO0_5 VSS PIO0_4/ADC_11/TRSTN VDD SWCLK/PIO0_3/TCK PIO0_8/ADC_5 SWDIO/PIO0_2/TMS PIO0_9/ADC_4 PIO0_11/ADC_6/WKTCLKIN PIO0_1/ADC_0/ACMP_I2/TDI/CLKIN PIO0_10/ADC_7 PIO0_15/ADC_8 PIO0_21/ACMP_I5 PIO0_20 aaa-029245 1 2 3 4 5 6 7 8 9 10 11 12 14 13 16 15 18 17 20 19 22 21 24 23 TSSOP-24 Fig 7. Pin configuration HVQFN33 package aaa-029246 Transparent top view PIO0_1/ADC_0/ACMP_I2/TDI/CLKIN SWDIO/PIO0_2/TMS PIO0_11/ADC_6/WKTCLKIN PIO0_9/ADC_4 SWCLK/PIO0_3/TCK PIO0_8/ADC_5 PIO0_4/ADC_11/TRSTN VDD RESET/PIO0_5 PIO0_30 PIO0_12 PIO0_7/ADC_1/ACMPVREF PIO0_13/ADC_10 VREFP PIO0_17/ADC_9 PIO0_0/ACMP_I1/TDO 8 17 7 18 6 19 5 20 421 3 22 2 23 1 24 terminal 1 index area 33 VSS |
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