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MON35W42 Datasheet(PDF) 6 Page - SMSC Corporation |
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MON35W42 Datasheet(HTML) 6 Page - SMSC Corporation |
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6 / 60 page ![]() 6 PIN DESCRIPTION I/O12t - TTL level bi-directional pin with 12 mA source-sink capability I/O12ts - TTL level and schmitt trigger OUT12 - Output pin with 12 mA source-sink capability AOUT - Output pin (Analog) OD12 - Open-drain output pin with 12 mA sink capability INt - TTL level input pin INts - TTL level input pin and schmitt trigger AIN - Input pin (Analog) DESCRIPTION OF PIN FUNCTIONS PIN NAME PIN NO. TYPE DESCRIPTION nIOR 1 IN ts An active low standard ISA bus I/O Read Control. nIOW 2 IN ts An active low standard ISA bus I/O Write Control. CLKIN 3 IN t System clock input. Can select 48MHz or 24MHz or 14.318MHz. The default is 24MHz. D7~D2 4-9 I/O12t Bi-directional ISA bus Data lines. D0 corresponds to the low order bit, with D7 the high order bit. These pins are activated if pin ADRMSEL=0. D1/ PWMOUT4 10 I/O12t OUT12t Bi-directional ISA bus Data lines. This pin is activated if pin ADRMSEL=0. /Fan speed control PWM output. This pin is activated if pin ADRMSEL=1. D0/ PWMOUT3 11 I/O12t OUT12t Bi-directional ISA bus Data lines. This pin is activated if pin ADRMSEL=0. /Fan speed control PWM output. This pin is activated if pin ADRMSEL=1. VID1 12 INt Voltage Supply readouts from P6. This value is read in the VID/Fan Divisor Register. VCC (+5V) 13 POWER +5V VCC power. Bypass with the parallel combination of 10 &F (electrolytic or tantalum) and 0.1 &F (ceramic) bypass capacitors. GNDD 14 DGROUND Internally connected to all digital circuitry. MR 15 IN ts Master reset input. nCASEOPEN 16 INt CASE OPEN detection. An active low input from an external device when the case is opened. This signal can be latched if VBAT is connect to a battery, even if the MON35W42 is power off. VID4 17 IN t Voltage Supply readouts from P6. This value is read in the bit <0> of Device ID Register. FAN3IO/ PWMOUT2 18 I/O12t 0V to +5V amplitude fan tachometer input. / Fan speed control PWM output. |
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