ACE25QC128G datasheet(7/56 Pages) ACE

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ACE25QC128G

128M BIT SPI NOR FLASH

VER 1.1

SPI Operation

Standard SPI Instructions

The ACE25QC128G features a serial peripheral interface on 4 signals bus: Serial Clock (SCLK), Chip

Select (/CS), Serial Data Input (SI) and Serial Data Output (SO). Both SPI bus mode 0 and 3 are supported.

Input data is latched on the rising edge of SCLK and data shifts out on the falling edge of SCLK.

Dual SPI Instructions

The ACE25QC128G supports Dual SPI operation when using the “Dual Output Fast Read” (3BH), “Dual

I/O Fast Read” (BBH) and “Read Manufacture ID/Device ID Dual I/O” (92H) instructions. These instructions

allow data to be transferred to or from the device at two times the rate of the standard SPI. When using the

Dual SPI instruction the SI and SO pins become bidirectional I/O pins: IO0 and IO1.

Quad SPI Instructions

The ACE25QC128G supports Quad SPI operation when using the “Quad Output Fast Read”(6BH), “Quad

I/O Fast Read” (EBH) ,”Quad I/O word Fast Read”(E7H),”Read Manufacture ID/Device ID Quad I/O”(94H)

and “Quad Page Program”(32H) instructions. These instructions allow data to be transferred to or from the

device at four times the rate of the standard SPI. When using the Quad SPI instruction the SI and SO pins

become bidirectional I/O pins: IO0 and IO1, and /WP and

/HOLD pins become IO2 and IO3. Quad SPI instructions require the non-volatile Quad Enable bit (QE) in

Status Register to be set.

Operation Features

Supply Voltage

(A)

Operating Supply Voltage

Prior to selecting the memory and issuing instructions to it, a valid and stable VCC voltage within the

specified [VCC(min), VCC(max)] range must be applied. In order to secure a stable DC supply voltage,

it is recommended to decouple the VCC line with a suitable capacitor (usually of the order of 10nF to

100nF) close to the VCC/VSS package pins. This voltage must remain stable and valid until the end of

the transmission of the instruction and, for a Write instruction, until the completion of the internal write

cycle (tW).

(B)

Power-up Conditions

When the power supply is turned on, VCC rises continuously from VSS to VCC. During this time, the

Chip Select (/CS) line is not allowed to float but should follow the VCC voltage, it is therefore

recommended to connect the /CS line to VCC via a suitable pull-up resistor.

ACE25QC128G Datasheet(PDF) 7 Page - ACE Technology Co., LTD.