S71PL129JC0 datasheet(77/149 Pages) SPANSION

77 / 149 page

June 4, 2004 S29PL129J_MCP_00_A0

S29PL129J for MCP

Advance

Informatio n

Notes:

1. Figure indicates last two bus cycles of a program or erase operation.

2. PA = program address, SA = sector address, PD = program data.

3. DQ7# is the complement of the data written to the device. DOUT is the data written to the device

4. S29PL129J - During CE1# transitions, CE2# = VIH; During CE2# transitions, CE1# = VIH

5. S29PL129J - There are two CE# (CE1#, CE2#). In the above waveform CE# = CE1# or CE2#

Table 23. Alternate CE# Controlled Write (Erase/Program) Operation Timings

Table 24. CE1#/CE2# Timing

Parameter

Description

All Speed Options

Unit

JEDEC

Std

tCCR

CE1#/CE2# Recover Time

Min

tGHEL

tWS

OE#

CE#

WE#

RESET#

tDS

Data

tAH

Addresses

tDH

tCP

DQ7#

DOUT

tWC

tAS

tCPH

Data# Polling

A0 for program

55 for erase

tRH

tWHWH1 or 2

RY/BY#

tWH

PD for program

30 for sector erase

10 for chip erase

555 for program

2AA for erase

PA for program

SA for sector erase

555 for chip erase

tBUSY

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