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S71PL129JC0 Datasheet(PDF) 99 Page - SPANSION |
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S71PL129JC0 Datasheet(HTML) 99 Page - SPANSION |
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99 / 149 page  August 30, 2004 pSRAM_Type01_12_A1 pSRAM Type 1 99 Advance Informatio n twc Write cycle time 55 ns 70 ns 70 ns tcw Chip select to end of write 45 ns 55 ns 70 ns tas Address set up Time 0ns 0 ns 0 ns taw Address valid to end of write 45 ns 55 ns 70 ns tbw UB#, LB# valid to end of write 45 ns 55 ns 70 ns twp Write pulse width 45 ns 55 ns 55 ns twr Write recovery time 0ns 0 ns 0 ns twhz Write to output High-Z 25 ns 25 20 ns tdw Data to write time overlap 40 ns 40 ns 25 ns tdh Data hold from write time 0ns 0 ns 0 ns tow End write to output Low-Z 55 5 tow Write high pulse width xx ns xx ns xx ns tpc Page read cycle x x x tpa Page address access time xxx twpc Page write cycle x x x tcp Chip select high pulse width xxx Asynchronous Version B C Performance Grade -55 -70 -70 Density 8Mb pSRAM 8Mb pSRAM 8Mb pSRAM 3 Volt Symbol Parameter Min Max Units Min Max Units Min Max Units |
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