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ML9092-01TB Datasheet(PDF) 54 Page - OKI electronic componets |
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ML9092-01TB Datasheet(HTML) 54 Page - OKI electronic componets |
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54 / 66 page ![]() FEDL9092-01 OKI Semiconductor ML9092-01/02/03/04 54/66 • PWM0/1/2 register (PWMR) set D7 D6 D5 D4 D3 D2 D1 D0 PWx7 PWx6 PWx5 PWx4 PWx3 PWx2 PWx1 PWx0 Note: “x” stands for 0 for PB0 (port B0), 1 for PB1 (port B1) and 2 for PB2 (port B2). This instruction sets the pulse width of the PWM signal output from port B. (Applies to ML9092-01/04.) PWx0 is LSB and PWx7 is MSB. This instruction should be used with a PWM data write cycle of 5.0 ms or longer. These bits are all reset to “0” if the RESET pin is pulled to a “L” level. Note: When inputting multiple PWM data items, be sure to input them in succession (i.e., without intervals). PWxn = 00 H (0/255) Fixed at “H” State at the time of reset PWxn = 01 H (1/255) PWxn = 02 H (2/255) PWxn = 03 H (3/255) PWxn = FE H (254/255) PWxn = FF H (255/255) Fixed at “H” • Test register (TEST) set D7 D6 D5 D4 D3 D2 D1 D0 — — — — T4 T3 T2 T1 —: don’t care This instruction is for testing by the manufacturer. Customers should not use this register. Figure 9 PWM Output Waveform |
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