uP1817

9

uP1817-DS-F0000, Mar. 2017

www.upi-semi.com

Functional Description

Table 4. Supported Data and Configuration Registers (uP1817P)

x

e

d

n

I

r

e

t

s

i

g

e

R

e

m

a

N

s

s

e

c

c

A

8

P

V

M

I

c

e

p

S

e

n

i

f

e

D

r

d

d

a

R

V

h

0

0

=

)

e

r

o

c

V

(

r

d

d

a

R

V

h

1

0

=

)

T

G

c

c

V

(

=

r

d

d

a

R

V

,

a

s

c

c

V

(

h

2

0

)

2

e

t

o

N

e

e

s

1

.

2

1

R

V

c

e

p

S

e

n

i

f

e

D

r

d

d

a

R

V

h

0

0

=

)

C

C

V

(

r

d

d

a

R

V

h

5

0

=

)

G

G

V

(

t

l

u

a

f

e

Dt

l

u

a

f

e

Dt

l

u

a

f

e

Dt

l

u

a

f

e

Dt

l

u

a

f

e

D

h

0

0D

I

r

o

d

n

e

Vr

o

d

n

e

v

O

RX

h

7

2h

7

2h

7

2X

h

7

2h

7

2

h

1

0D

I

t

c

u

d

o

r

Pr

o

d

n

e

v

O

RX

h

F

1h

F

1h

F

1X

h

F

1h

F

1

h

2

0

t

c

u

d

o

r

P

n

o

i

s

i

v

e

R

r

o

d

n

e

v

O

RX

h

0

0h

0

0h

0

0X

h

0

0h

0

0

h

5

0D

I

l

o

c

o

t

o

r

Pr

o

d

n

e

v

O

RX

h

5

0h

5

0h

5

0X

h

6

0h

6

0

h

6

0y

t

il

i

b

a

p

a

Cr

o

d

n

e

v

O

RX

h

1

8h

1

8h

1

8X

h

1

8h

1

8

h

0

11

_

s

u

t

a

t

S

M

-

R

M

W

P

-

W

Xh

0

0h

0

0h

0

0X

h

0

0h

0

0

h

1

12

_

s

u

t

a

t

S

M

-

R

M

W

P

-

W

Xh

0

0h

0

0h

0

0X

h

0

0h

0

0

h

5

1t

u

o

I

M

-

R

M

W

P

-

W

X

0

N

O

M

I

C

D

A

1

N

O

M

I

C

D

A

h

2

0X

C

D

A

0

N

O

M

IC

D

A

1

N

O

M

I

h

C

1

_

2

s

u

t

a

t

S

d

a

e

r

t

s

a

l

M

-

R

M

W

P

-

W

Xh

0

0h

0

0h

0

0X

h

0

0h

0

0

h

1

2X

A

M

C

C

Im

r

o

f

t

a

l

p

O

RX

s

d

n

e

p

e

d

W

H

n

o

g

n

i

t

t

e

s

s

d

n

e

p

e

d

W

H

n

o

g

n

i

t

t

e

s

h

5

0X

n

o

s

d

n

e

p

e

d

g

n

i

t

t

e

s

W

H

n

o

s

d

n

e

p

e

d

g

n

i

t

t

e

s

W

H

h

2

2X

A

M

Tm

r

o

f

t

a

l

p

O

RO

h

9

6h

9

6h

9

6O

h

9

6h

9

6

h

4

2t

s

a

f

_

R

Sm

r

o

f

t

a

l

p

O

RX

h

E

1h

E

1h

E

1X

h

A

0h

A

0

h

5

2w

o

l

s

_

R

Sm

r

o

f

t

a

l

p

O

RX

h

7

0h

7

0h

7

0X

h

2

0h

2

0

h

6

2t

o

o

b

Vm

r

o

f

t

a

l

p

O

RX

s

d

n

e

p

e

d

W

H

n

o

g

n

i

t

t

e

s

s

d

n

e

p

e

d

W

H

n

o

g

n

i

t

t

e

s

)

V

5

0

.

1

=

(

h

1

AX

n

o

s

d

n

e

p

e

d

g

n

i

t

t

e

s

W

H

n

o

s

d

n

e

p

e

d

g

n

i

t

t

e

s

W

H

h

A

2

w

e

l

S

w

o

l

S

e

t

a

R

r

o

t

c

e

l

e

S

r

e

t

s

a

M

W

RX

h

1

0h

1

0h

1

0N

h

2

0h

2

0

h

B

2

t

i

x

E

4

S

P

y

c

n

e

t

a

L

y

l

n

o

RX

h

F

7

)

s

u

8

2

1

(

h

F

7

)

s

u

8

2

1

(

)

s

u

8

2

1

(

h

F

7O

)

s

u

8

2

1

(

h

F

7

)

s

u

8

2

1

(

h

F

7

h

C

2

t

i

x

E

3

S

P

y

c

n

e

t

a

L

y

l

n

o

RX

)

s

u

8

(

h

F

3)

s

u

8

(

h

F

3)

s

u

8

(

h

F

3O

)

s

u

8

(

h

F

3)

s

u

8

(

h

F

3

h

D

2

o

t

e

l

b

a

n

E

y

d

a

e

R

D

I

V

S

y

l

n

o

RX

h

F

B

)

s

u

8

4

0

2

(

h

F

B

)

s

u

8

4

0

2

(

)

s

u

8

4

0

2

(

h

F

BO

h

F

B

)

s

u

8

4

0

2

(

h

F

B

)

s

u

8

4

0

2

(

Note1: O: Optional

X: Required

N: Not Supported

Note2: No physical reference voltage output, SVID command response only. In IMVP8 mode, VR address 02h does

not affect ALERT# assertion.