GPL191C

© Generalplus Technology Inc.

Proprietary & Confidential

7

Mar. 08, 2010

Version: 1.1

6. FUNCTIONAL DESCRIPTIONS

6.1. ROM Area

The GPL191C is a large ROM based micro-controller with 1024

dots LCD driver. The large ROM can be defined as program

ROM, LCD fonts and audio data continuously without any

limitation.

To access ROM, users should program the Bank

Select register, choose bank, and then access bank address to

fetch data.

6.2. Map of Memory and I/Os

*I/O PORT:

*NMI SOURCE:

*INT SOURCE:

- INT1 ( from TIMER 1 )

- I/O AB_CTRL $0001

- PORT IOAB $0002

- PORT IOEF $0004

- PORT IOCD $0003

- I/O CD_CTRL $0000

- I/O EF_CTRL $0006

- INT0 ( from TIMER 0 )

- INT1 ( from TIMER 1 )

- 2 KHz

- T2 Hz ( 2Hz / 1 Hz)

- T16 Hz ( 4Hz/8Hz/16Hz/32Hz )

- 128 Hz

- EXT INT ( from IOCD1 pin )

- UART

*MEMORY MAP

H/W registers , I/Os

$00000

WORKING SRAM (192 bytes)

$0003F

$00040

GENERALPLUS TEST

PROGRAM

$000FF

$00400

USER's PROGRAM

DATA

AREA

SRAM for STACK and

Data Storage (512 bytes)

$00100

$002FF

$007FF

$00800

$07FFF

$08000

ROM BANK #1

$0FFFF

$10000

ROM BANK #2

$17FFF

$18000

ROM BANK #3

$1FFFF

$20000

ROM BANK #4

$27FFF

$28000

ROM BANK #5

$2FFFF

ROM BANK #0

$00300

LCD Buffer (128 bytes)

$0037F

ROM BANK #6

$30000

ROM BANK #7

$37FFF

$38000

$3FFFF

Note: $7FFA - $7FFF in ROM bank#0, and $FFFA - $FFFF in bank#1 – 7

are reserved for reset vectors.

$7FF2 - $7FF7 in bank#0, and $FFF2 - $FFF7 in bank#1 – 7 are reserved

for GENERALPLUS testing.

6.3. Operating States

The GPL191C supports three operating states: standby, halt, and

operating. Following table shows the differences between the

three operating states.

Operating

Halt

Standby

CPU

ON

OFF

OFF

32768 oscillator

ON

ON

OFF

LCD driver

ON

ON/OFF

OFF

In the operating state, all modules (CPU, 32768Hz oscillator,

timer/counter, LCD drive, etc.) are activated. The halt/standby

state is entered by writing to the SLEEP register. There are four

wake-up sources in GPL191C: port IOEF wake-up, Timer0

wake-up, 4Hz/ 8Hz/ 16Hz/ 32Hz wake-up and 2Hz/ 1Hz wake-up.

If any wake-up event occurs, execution of the next instruction

continues in the operating state.

When in standby, all modules are shut down, and RAM and I/Os

remain in their previous states.

Current consumption is

minimized in standby. By writing to the SLEEP register while the

32768Hz oscillator running, the system is in halt state. In halt

state, CPU clock is halted while it waits for an event (key press,

timer overflow) to generate a wake-up.

The 32768 related

modules (timer/counter, LCD drive, etc.) may remain active in the

halt state. The following figure is the GPL191C state diagram.

HALT

OPERATING

STANDBY

Write to SLEEP register,

32768 oscillator OFF

Wake-up or user reset

GPL191C State Diagram

6.4. Speech and Melody

Since the GPL191C provides large ROM and wide range of CPU

operating speed, it is very suitable for speech and melody

synthesis.

For speech synthesis, GPL191C provides several

timer interrupts for precise sampling frequency. Users can record

or synthesize the sound and digitize it into the ROM. The sound

then can be played back in the sequence assigned by the users’

programs. Several algorithms are recommended for high fidelity

and good compression of sound: such as PCM and ADPCM.

For melody synthesis, the GPL191C provides a dual tone mode.

Once in the dual tone mode, users need only to program the tone

frequency for each channel by writing to the timer/counter TM0

and TM1, and set the envelope for each channel. The hardware

will toggle the tone wave automatically.