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ESP32 Datasheet(PDF) 32 Page - ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD. |
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ESP32 Datasheet(HTML) 32 Page - ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD. |
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32 / 60 page ![]() 4. Peripherals and Sensors • Tagged MAC frame (VLAN support) • Half-duplex (CSMA/CD) and full-duplex operation • MAC control sublayer (control frames) • 32-bit CRC generation and removal • Several address-filtering modes for physical and multicast address (multicast and group addresses) • 32-bit status code for each transmitted or received frame • Internal FIFOs to buffer transmit and receive frames. The transmit FIFO and the receive FIFO are both 512 words (32-bit) • Hardware PTP (Precision Time Protocol) in accordance with IEEE 1588 2008 (PTP V2) • 25 MHz/50 MHz clock output 4.1.8 SD/SDIO/MMC Host Controller An SD/SDIO/MMC host controller is available on ESP32, which supports the following features: • Secure Digital memory (SD mem Version 3.0 and Version 3.01) • Secure Digital I/O (SDIO Version 3.0) • Consumer Electronics Advanced Transport Architecture (CE-ATA Version 1.1) • Multimedia Cards (MMC Version 4.41, eMMC Version 4.5 and Version 4.51) The controller allows up to 80 MHz of clock output in three different data-bus modes: 1-bit, 4-bit and 8-bit. It supports two SD/SDIO/MMC4.41 cards in a 4-bit data-bus mode. It also supports one SD card operating at 1.8V. 4.1.9 SDIO/SPI Slave Controller ESP32 integrates an SD device interface that conforms to the industry-standard SDIO Card Specification Version 2.0, and allows a host controller to access the SoC, using the SDIO bus interface and protocol. ESP32 acts as the slave on the SDIO bus. The host can access the SDIO-interface registers directly and can access shared memory via a DMA engine, thus maximizing performance without engaging the processor cores. The SDIO/SPI slave controller supports the following features: • SPI, 1-bit SDIO, and 4-bit SDIO transfer modes over the full clock range from 0 to 50 MHz • Configurable sampling and driving clock edge • Special registers for direct access by host • Interrupts to host for initiating data transfer • Automatic loading of SDIO bus data and automatic discarding of padding data • Block size of up to 512 bytes • Interrupt vectors between the host and the slave, allowing both to interrupt each other • Supports DMA for data transfer Espressif Systems 25 ESP32 Datasheet V3.0 |
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