ADRF5027

Data Sheet

Rev. 0 | Page 10 of 13

APPLICATIONS INFORMATION

EVALUATION BOARD

The ADRF5027-EVALZ evaluation board is a 4-layer evaluation

board. The outer copper (Cu) layers are 0.5 oz (0.7 mil) plated

to 1.5 oz (2.2 mil) and are separated by dielectric materials.

Figure 15 shows the ADRF5027-EVALZ evaluation board stack up.

1.5oz Cu (2.2mil)

1.5oz Cu (2.2mil)

0.5oz Cu (0.7mil)

0.5oz Cu (0.7mil)

1.5oz Cu (2.2mil)

RO4003

1.5oz Cu (2.2mil)

W = 14mil

G = 7mil

T = 2.2mil

H = 8mil

Figure 15. Evaluation Board Stack Up

All RF and dc traces are routed on the top copper layer, whereas

the inner and bottom layers are ground planes that provide a

solid ground for the RF transmission lines. The top dielectric

material is 8 mil Rogers RO4003, which offers optimal high

frequency performance. The middle and bottom dielectric

materials provide mechanical strength. The overall board

thickness is 62 mil, which allows 2.4 mm RF launchers to be

connected at the board edges.

Figure 16. Evaluation Board Layout

The RF transmission lines are designed using a coplanar

waveguide (CPWG) model with a width of 14 mil and a ground

spacing of 7 mil, and have a characteristic impedance of 50 Ω.

For optimal RF and thermal grounding, as many plated through

vias as possible are arranged around transmission lines and

under the exposed pad of the package.

The RF input and output ports (RFC, RF1, and RF2) are connected

through 50 Ω transmission lines to the 2.4 mm launchers (J1,

J2, and J3, respectively). These high frequency RF launchers are

connected by contact and are not soldered to the board.

The thru calibration line, THRU CAL, can calibrate out the

board loss effects from the ADRF5027-EVALZ evaluation board

measurements to determine the device performance at the pins

of the IC. Figure 17 shows the typical board loss for the

ADRF5027-EVALZ evaluation board at room temperature, the

embedded insertion loss, and the de-embedded insertion loss

for the ADRF5027.

0

–8

–7

–6

–5

–4

–3

–2

–1

0

5

10

15

25

35

20

30

40

45

FREQUENCY (GHz)

THRU LOSS

EMBEDDED IL

DEEMBEDDED IL

Figure 17. Insertion Loss vs. Frequency

Two power supply ports are connected to the VDD and VSS test

points, and the ground reference is connected to the GND test

point. On the supply traces, VDD and VSS, a 100 pF bypass

capacitor filters high frequency noise. Additionally, unpopulated

component positions are available for applying extra bypass

capacitors.

Two control ports are connected to the EN and CTRL test

points. There are provisions for the resistor capacitor (RC) filter

to eliminate dc-coupled noise, if needed by the application.

The ADRF5027-EVALZ evaluation board schematic is shown in

Figure 18.

GND

GND

RFC

GND

GND

GND

EN

VSS

VSS

CTRL

VDD

EN

CTRL

VDD

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

ADRF5027

RF2

RFC

RF1

R4

0Ω

R3

0Ω

C10

100pF

C7

100pF

THRU_CAL

Figure 18. Simplified Evaluation Board Schematic