DAC5687IPZP datasheet(53/72 Pages) TI

53 / 72 page

www.ti.com

Digital Inputs

DA[15:0]

DB[15:0]

SLEEP

PHSTR

TxENABLE

QFLAG

SDIO

SCLK

SDENB

Internal

Digital In

IOVDD

IOGND

RESETB

Internal

Digital In

IOVDD

IOGND

Clock Inputs

CLK

Internal

Digital In

CLKC

CLKGND

10 k

Ω

CLKVDD

10 k

Ω

10 k

Ω

10 k

Ω

CLKVDD

S0028-01

DAC5687

SLWS164B – FEBRUARY 2005 – REVISED JUNE 2005

Applying the QMC gain of 1446, equivalent to 2½, increases the signal back to unity gain through the FMIX and

the QMC blocks.

Note that with this termination, the DAC side of the transformer is not 50-

Ω terminated and therefore may result

in reflections when used with a cable output.

Figure 60 shows a schematic of the equivalent CMOS digital inputs of the DAC5687. DA[0..15], DB[0..15],

SLEEP, PHSTR, TXENABLE, QFLAG, SDIO, SCLK, and SDENB have pull-down resistors and RESETB has a

pull-up resistor internal to the DAC5687. See the specification table for logic thresholds.

Figure 60. CMOS/TTL Digital Equivalent Input

Figure 61 shows an equivalent circuit for the clock input.

Figure 61. Clock Input Equivalent Circuit

Figure 62, Figure 63, and Figure 64 show various input configurations for driving the differential clock input

(CLK/CLKC).

DAC5687IPZP Datasheet(PDF) 53 Page - Texas Instruments

DAC5687IPZP Datasheet(HTML) 53 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72

Datasheet Download

Link URL