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LXT975B Datasheet(PDF) 57 Page - Intel Corporation |
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LXT975B Datasheet(HTML) 57 Page - Intel Corporation |
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57 / 74 page  Fast Ethernet 10/100 Quad Transceivers — LXT974/LXT975 Datasheet 57 Figure 30. MII - 10BASE-T Receive Timing Table 35. MII - 10BASE-T Receive Timing Parameters Parameter Sym Min Typ 1 Max Units RXD, RX_DV, RX_ER setup to RX_CLK High t1 10 –– ns RXD, RX_DV, RX_ER hold from RX_CLK High t2 10 –– ns TPI in to RXD out (Rx latency) t3 –– 732 BT CRS asserted to RXD, RX_DV, RX_ER asserted t4 0 – 692 BT RXD, RX_DV, RX_ER de-asserted to CRS de-asserted t5 0 2.5 - 5.5 6 BT TPI in to CRS asserted t6 0 4 5 BT TPI quiet to CRS de-asserted t7 0 18 19 BT TPI in to COL asserted t8 0 4 5 BT TPI quiet to COL de-asserted t9 0 18 19 BT 1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production testing. 2. CRS is asserted. RXD/RX_DV are driven at the start of SFD (64 BT). RX_CLK RXD, RX_DV, RX_ER CRS TPI t3 t4 t2 t6 t1 t7 t5 COL t8 t9 |
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