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RT8207LZQW Datasheet(PDF) 20 Page - Richtek Technology Corporation |
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RT8207LZQW Datasheet(HTML) 20 Page - Richtek Technology Corporation |
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20 / 27 page ![]() 20 DS8207L/M-08 September 2016 www.richtek.com RT8207L/M © Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. The low side driver is designed to drive high current, low RDS(ON) N-MOSFET(s). The internal pull down transistor that drives LGATE low is robust, with a 0.8 Ω typical on resistance. A 5V bias voltage is delivered from the VDDP supply. The instantaneous drive current is supplied by the flying capacitor between VDDP and PGND. For high current applications, some combinations of high and low side MOSFETs may cause excessive gate drain coupling, which leads to efficiency killing, EMI producing shoot through currents. This is often remedied by adding a resistor in series with BOOT, which increases the turn- on rising time of the high side MOSFET without degrading the turn-off time (Figure 7). BOOT UGATE PHASE R VIN Figure 7. Increasing the UGATE Rise Time Power Good Output (PGOOD) The power good output is an open drain output that requires a pull up resistor. When the output voltage is 15% above or 10% below its set voltage, PGOOD gets pulled low. It is held low until the output voltage returns to within these tolerances once more. During soft-start, PGOOD is actively held low and only allowed to transition high after soft-start is over and the output reaches 93% of its set voltage. There is a 2.5 μs delay built into PGOOD circuitry to prevent false transition. POR Protection The RT8207L/M has a VDDP supply power on reset protection (POR). When the VDDP voltage is higher than 4.2V (typ.), VDDQ, VTT and VTTREF will be activated. This is a non-latch protection. Soft-Start The RT8207L/M provides an internal soft-start function to prevent large inrush current and output voltage overshoot when the converter starts up. Soft-start (SS) automatically begins once the chip is enabled. During soft-start, internal current limit circuit gradually ramps up the inductor current from zero. The maximum current-limit value is set externally as described in previous section. The soft-start time is determined by the current limit level and output capacitor value. If the current limit threshold is set for 200mV, the typical soft-start duration is 3ms after S5 is enabled. The soft-start function of VTT is achieved by the current limit and VTTREF voltage through the internal RC delay ramp up after S3 is high. During VTT startup, the current limit level is 2.6A. This allows the output to start up smoothly and safely under enough source/sink ability. Output Over Voltage Protection (OVP) The output voltage can be continuously monitored for over voltage. If the output exceeds 15% of its set voltage threshold, over voltage protection is triggered and the LGATE low side gate driver is forced high. This activates the low side MOSFET switch which rapidly discharges the output capacitor and reduces the input voltage. There is a 5 μs latch delay built into the over voltage protection circuit. The RT8207L/M will be latched if the output voltage remains above the OV threshold after the latch delay period and can then only be released by VDD power on reset or S5. Note that latching the LGATE high will cause the output voltage to dip slightly negative when energy has been previously stored in the LC tank circuit. For loads that cannot tolerate a negative voltage, place a power Schottky diode across the output to act as a reverse polarity clamp. If the over voltage condition is caused by a short in high side switch, turning the low side MOSFET on 100% will create an electrical short between the battery and GND, hence blowing the fuse and disconnecting the battery from the output. Output Under Voltage Protection (UVP) The output voltage can be continuously monitored for under voltage. When enabled, the under voltage protection is triggered if the output is less than 70% of its set voltage threshold. Then, both UGATE and LGATE gate drivers will be forced low while entering soft discharge mode. During soft-start, the UVP has a blanking time around 5ms. |
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