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RT8207LZQW Datasheet(PDF) 24 Page - Richtek Technology Corporation

Part # RT8207LZQW
Description  Complete DDRII/DDRIII/Low-Power DDRIII/DDRIV Memory Power Supply Controller
PDF  27 Pages
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Manufacturer  RICHTEK [Richtek Technology Corporation]
Direct Link  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

RT8207LZQW Datasheet(HTML) 24 Page - Richtek Technology Corporation

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24
DS8207L/M-08 September 2016
www.richtek.com
RT8207L/M
©
Copyright 2016 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
Figure 9. Derating Curve of Maximum Power Dissipation
Layout Considerations
Layout is very important in high frequency switching
converter design. If designed improperly, the PCB could
radiate excessive noise and contribute to the converter
instability. Certain points must be considered before
starting a layout for the RT8207L/M.
Connect an RC low pass filter from VDDP to VDD; 1
μF
and 5.1
Ω are recommended. Place the filter capacitor
close to the IC.
Keep current limit setting network as close as possible
to the IC. Routing of the network should avoid coupling
to high voltage switching node.
Connections from the drivers to the respective gate of
the high side or the low side MOSFET should be as
short as possible to reduce stray inductance.
All sensitive analog traces and components such as
VDDQ, FB, PGND, PGOOD, CS, VDD, and TON should
be placed away from high voltage switching nodes such
as PHASE, LGATE, UGATE, and BOOT to avoid
coupling. Use internal layer(s) as ground plane(s) and
shield the feedback trace from power traces and
components.
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0
25
50
75
100
125
Ambient Temperature (°C)
Four-Layer PCB
WQFN-24L 4x4
WQFN-20L 3x3
Thermal Considerations
The junction temperature should never exceed the
absolute maximum junction temperature TJ(MAX), listed
under Absolute Maximum Ratings, to avoid permanent
damage to the device. The maximum allowable power
dissipation depends on the thermal resistance of the IC
package, the PCB layout, the rate of surrounding airflow,
and the difference between the junction and ambient
temperatures. The maximum power dissipation can be
calculated using the following formula :
PD(MAX) = (TJ(MAX)
− TA) / θJA
where TJ(MAX) is the maximum junction temperature, TAis
the ambient temperature, and
θJA is the junction-to-ambient
thermal resistance.
For continuous operation, the maximum operating junction
temperature indicated under Recommended Operating
Conditions is 125
°C. The junction-to-ambient thermal
resistance,
θJA, is highly package dependent. For a
WQFN-24L 4x4 package, the thermal resistance,
θJA, is
52
°C/W on a standard JEDEC 51-7 high effective-thermal-
conductivity four-layer test board. For a WQFN-20L 3x3
package, the thermal resistance,
θJA, is 68°C/W on a
standard JEDEC 51-7 high effective-thermal-conductivity
four-layer test board. The maximum power dissipation at
TA = 25
°C can be calculated as below :
PD(MAX) = (125
°C − 25°C) / (52°C/W) = 1.923W for a
WQFN-24L 4x4 package.
PD(MAX) = (125
°C − 25°C) / (68°C/W) = 1.471W for a
WQFN-20L 3x3 package.
The maximum power dissipation depends on the operating
ambient temperature for the fixed TJ(MAX) and the thermal
resistance,
θJA. The derating curves in Figure 9 allows
the designer to see the effect of rising ambient temperature
on the maximum power dissipation.



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