RT8207LZQW datasheet(23/27 Pages) RICHTEK

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DS8207L/M-08 September 2016

www.richtek.com

RT8207L/M

is a registered trademark of Richtek Technology Corporation.

This inductor ripple current also impacts transient-response

performance, especially at low VIN

− VVDDQ differences.

Low inductor values allow the inductor current to slew

faster, replenishing charge removed from the output filter

capacitors by a sudden load step. The peak amplitude of

the output transient (VSAG) is also a function of the output

transient. VSAG also features a function of the maximum

duty factor, which can be calculated from the on-time and

minimum off-time :

()











SAG

LOAD

OFF(MIN)

OUT

VDDQ

OFF(MIN)

x L x (t

)

2 x C

x V

x V x t

x (t

)

where minimum off-time, tOFF(MIN), is 400ns typically.

Output Capacitor Selection

The output filter capacitor must have low enough ESR to

meet output ripple and load-transient requirements, yet

have high enough ESR to satisfy stability requirements.

Also, the capacitance must be high enough to absorb the

inductor energy going from a full-load to no-load condition

without tripping the OVP circuit.

For CPU core voltage converters and other applications

where the output is subject to violent load transients, the

output capacitor's size depends on how much ESR is

needed to prevent the output from dipping too low under a

load transient. Ignoring the sag due to finite capacitance :





LOAD(MAX)

ESR

In non-CPU applications, the output capacitor's size

depends on how much ESR is needed to maintain an

acceptable level of output voltage ripple :





LOAD(MAX)

ESR

x I

where VP−P is the peak-to-peak output voltage ripple.

Organic semiconductor capacitor(s) or specialty polymer

capacitor(s) are recommended.

For low input-to-output voltage differentials (VIN/VVDDQ <

2), additional output capacitance is required to maintain

stability and good efficiency in ultrasonic mode.



PEAK

SOAR

OUT

VDDQ

) x L

2 x C

x V

where IPEAK is the peak inductor current.

Output Capacitor Stability

Stability is determined by the value of the ESR zero relative

to the switching frequency. The point of instability is given

by the following equation :



 SW

ESR

OUT

2 x

x ESR x C

The amount of overshoot due to stored inductor energy

can be calculated as :

Do not put high value ceramic capacitors directly across

the outputs without taking precautions to ensure stability.

Large ceramic capacitors can have a high ESR zero

frequency and cause erratic, unstable operation. However,

it is easy to add enough series resistance by placing the

capacitors a couple of inches downstream from the

inductor and connecting VDDQ or the FB voltage-divider

close to the inductor.

Unstable operation manifests itself in two related and

distinctly different ways: double-pulsing and feedback loop

instability.

Double-pulsing occurs due to noise on the output or

because the ESR is so low that there is not enough voltage

ramp in the output voltage signal. This “fools” the error

comparator into triggering a new cycle immediately after

the 400ns minimum off-time period has expired. Double

pulsing is more annoying than harmful, resulting in nothing

worse than increased output ripple. However, it may

indicate the possible presence of loop instability, which

is caused by insufficient ESR.

Loop instability can result in oscillations at the output in

the form of line or load perturbations, which can trip the

over voltage protection latch or cause the output voltage

to fall below the tolerance limit.

The easiest method for checking stability is to apply a

very fast zero-to-max load transient and carefully observe

the output-voltage-ripple envelope for overshoot and ringing.

It helps to simultaneously monitor the inductor current

with an AC current probe. Do not allow more than one

cycle of ringing after the initial step-response under- or

over-shoot.

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