EM78P258NN datasheet(74/81 Pages) EMC

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EM78P258N

8-Bit Microprocessor with OTP ROM

•

Product Specification (V1.0) 06.16.2005

(This specification is subject to change without further notice)

ICC2

Operating supply current

at two clocks (VDD to 3V)

/RESET= 'High', Fosc=32KHz

(Crystal type,CLKS="0"), output

pin floating, WDT enabled

µA

ICC3

Operating supply current

at two clocks

/RESET= 'High', Fosc=4MHz

(Crystal type, CLKS="0"), output

pin floating, WDT enabled

1.9

2.2

ICC4

Operating supply current

at two clocks

/RESET= 'High', Fosc=10MHz

(Crystal type, CLKS="0"), output

pin floating, WDT enabled

3.0

3.5

NOTE: 1. These parameters are hypothetical (not tested) and are provided for design reference use only.

2. Data under minimum, typical, & maximum (Min, Typ, & Max) columns are based on hypothetical

results at 25℃. These data are for design guidance only.

8.1

AD Converter Characteristics

(Vdd=2.5V to 5.5V, Vss=0V, Ta=25℃)

Symbol

Parameter

Condition

Min.

Typ.

Max.

Unit

VAREF

2.5

–

Vdd

VASS

Analog reference voltage

VAREF - VASS≧2.5V

Vss

–

Vss

VAI

Analog input voltage

–

VASS

–

VAREF

Ivdd

750

850

1000

IAI1

Ivref

Analog supply current

Vdd=VAREF=5.0V, VASS

=0.0V(V reference from Vdd)

–10

+10

Ivdd

500

600

820

IAI2

IVref

Analog supply current

Vdd=VAREF=5.0V, VASS=0.0V

(V reference from VREF)

200

250

300

IOP

OP current

Vdd=5.0V, OP used

Output voltage swing 0.2V to

4.8V

450

550

650

Resolution

Vdd=VAREF=5.0V, VASS =0.0V

–

Bits

Linearity error

Vdd = 2.5 to 5.5V Ta=25℃

±4

±8

LSB

DNL

Differential nonlinear error

Vdd = 2.5 to 5.5V Ta=25℃

±0.5

±0.9

LSB

FSE

Full scale error

Vdd=VAREF=5.0V, VASS =0.0V

±0

±4

±8

LSB

Offset error

Vdd=VAREF=5.0V, VASS =0.0V

±0

±2

±4

LSB

ZAI

Recommended impedance of

analog voltage source

–

KΩ

TAD

ADC clock period

Vdd=VAREF=5.0V, VASS =0.0V

–

TCN

AD conversion time

Vdd=VAREF=5.0V, VASS =0.0V

–

TAD

ADIV

ADC OP input voltage range

Vdd=VAREF=5.0V, VASS =0.0V

–

VAREF

0.2

0.3

ADOV

ADC OP output voltage swing

Vdd=VAREF=5.0V, VASS

=0.0V,RL=10KΩ

4.7

4.8

ADSR

ADC OP slew rate

Vdd=VAREF=5.0V, VASS =0.0V

0.1

0.3

–

V/us

PSR

Power Supply Rejection

Vdd=5.0V±0.5V

±0

–

±2

LSB

NOTE: 1. These parameters are hypothetical (not tested) and are provided for design reference use only.

2. There is no current consumption when ADC is off other than minor leakage current.

3. AD conversion result will not decrease when the increase of input voltage and no missing code

will result.

EM78P258NN Datasheet(PDF) 74 Page - ELAN Microelectronics Corp

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