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SAFC161PI Datasheet(PDF) 47 Page - Infineon Technologies AG |
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SAFC161PI Datasheet(HTML) 47 Page - Infineon Technologies AG |
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47 / 400 page  &3, 0HPRU\ 2UJDQL]DWLRQ User’s Manual 3-11 1999-08 3.4 External Memory Space The C161PI is capable of using an address space of up to 16 MByte. Only parts of this address space are occupied by internal memory areas. All addresses which are not used for on-chip memory (ROM/Flash/OTP or RAM) or for registers may reference external memory locations. This external memory is accessed via the C161PI’s external bus interface. Four memory bank sizes are supported: • Non-segmented mode: 64 KByte with A15...A0 on PORT0 or PORT1 • 2-bit segmented mode: 256 KByte with A17...A16 on Port 4 and A15...A0 on PORT0 or PORT1 • 4-bit segmented mode: 1 MByte with A19...A16 on Port 4 and A15...A0 on PORT0 or PORT1 • 7-bit segmented mode: 8 MByte with A22...A16 on Port 4 and A15...A0 on PORT0 or PORT1 Each bank can be directly addressed via the address bus, while the programmable chip select signals can be used to select various memory banks. The C161PI also supports four different bus types: • Multiplexed 16-bit Bus with address and data on PORT0 (Default after Reset) • Multiplexed 8-bit Bus with address and data on PORT0/P0L • Demultiplexed 16-bit Bus with address on PORT1 and data on PORT0 • Demultiplexed 8-bit Bus with address on PORT1 and data on P0L Memory model and bus mode are selected during reset by pin EA and PORT0 pins. For further details about the external bus configuration and control please refer to chapter "The External Bus Interface". External word and byte data can only be accessed via indirect or long 16-bit addressing modes using one of the four DPP registers. There is no short addressing mode for external operands. Any word data access is made to an even byte address. For PEC data transfers the external memory in segment 0 can be accessed independent of the contents of the DPP registers via the PEC source and destination pointers. The external memory is not provided for single bit storage and therefore it is not bit addressable. |
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