WM8771 datasheet(37/44 Pages) WOLFSON

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WM8771

PP Rev 2.0 December 2001

ADCMUTE

Mute for Left and Right channel ADC:

0: Mute off

1: Mute on

4:0

RAG[4:0]

01100

(0dB)

Attenuation data for right channel ADC gain in 1dB steps

MUTE

Mute for Right channel ADC:

0: Mute off

1: Mute on

11010

Attenuation

ADCR

LRBOTH

Setting LRBOTH will write the same gain value to RAG[4:0 and

LAG[4:0]

2:0

LMX[2:0]

000

ADC left channel input mux control bits (see Table 12)

6:4

RMX[2:0]

000

ADC right channel input mux control bits (see Table 12)

11011

ADC mux and

powerdown

control

AINPD

Input mux and buffer powerdown

0: Input mux and buffer enabled

1: Input mux and buffer powered down

11100

Output

powerdown

control

8:7

OUTPD[1:0]

DAC Output Powerdown select

0: output buffer enabled

1: output buffer powered down

11101

Output

powerdown

control

8:7

OUTPD[3:2]

DAC Output Powerdown select

0: output buffer enabled

1: output buffer powered down

11111

Software

reset

[8:0]

RESET

Not reset

Writing to this register will apply a reset to the device registers.

Table 13 Register Map Description

WM8771 Datasheet(PDF) 37 Page - Wolfson Microelectronics plc

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