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SL2S2602 Datasheet(PDF) 46 Page - NXP Semiconductors |
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SL2S2602 Datasheet(HTML) 46 Page - NXP Semiconductors |
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46 / 55 page  NXP Semiconductors SL2S2602 ICODE SLIX2 SL2S2602 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2017. All rights reserved. Product data sheet Rev. 4.1 — 25 July 2017 COMPANY PUBLIC 276341 46 / 55 14 Bare die outline aaa-016467 not to scale! (1) (7) (2) (8) (5) (6) (4) (3) Y X GND LA LB TEST (9) (10) (1) X-scribe line width: 15 μm (2) Y-scribe line width: 15 μm (3) Chip step, X-length: 555 μm (4) Chip step, Y-length: 558 μm (5) Bump to bump distance X (LA - LB): 430 μm (6) Bump to bump distance Y (LB - TEST): 371.5 μm (7) Distance GND bump to nitride edge X: 45 μm (8) Distance GND bump to nitride edge Y: 45 μm (9) Distance LA bump to nitride edge X: 55 μm (10) Bump to bump distance X (GND - TEST): 450 μm Bump size LA and LB (X × Y): 80 μm × 80 μm Bump size TEST and GND (X × Y): 60 μm × 60 μm Figure 8. Wafer SL2S2602FUD/BG bare die layout |
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