M58LT128GS datasheet(82/98 Pages) STMICROELECTRONICS

Part #	M58LT128GS

Description	128Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Secure Flash Memories

PDF	98 Pages

Scroll/Zoom	100%

Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

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82 / 98 page

13 Part Numbering

M58LT128GST, M58LT128GSB

82/98

The variable P is a pointer which is defined at CFI offset 015h.

Bank Regions. There are two Bank Regions, see Table 30 to Table 32 for the M58LT128GST and Table 33 to Table 35 for

the M58LT128GSB.

(P+44)h = 14Eh

64h

Bank Region 2 (Erase Block Type 2)

Minimum block erase cycles × 1000

(P+45)h = 14Fh

00h

(P+46)h = 150h

02h

Bank Region 2 (Erase Block Type 2): BIts per cell, internal

ECC

Bits 0-3: bits per cell in erase region

Bit 4: reserved for “internal ECC used”

BIts 5-7: reserved

(P+47)h = 151h

03h

Bank Region 2 (Erase Block Type 2): Page mode and

Synchronous mode capabilities (defined in Table 42)

Bit 0: Page-mode reads permitted

Bit 1: Synchronous reads permitted

Bit 2: Synchronous writes permitted

Bits 3-7: reserved

(P+48)h = 152h

Feature Space definitions

(P+49)h = 153h

(P+43)h = 153h

Reserved

Flash memory (top)

Flash memory (bottom)

Description

Offset

Data

Offset

Data

M58LT128GS Datasheet(PDF) 82 Page - STMicroelectronics