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ATXMEGA32E5 Datasheet(PDF) 85 Page - Microchip Technology |
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ATXMEGA32E5 Datasheet(HTML) 85 Page - Microchip Technology |
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85 / 153 page ![]() 2018 Microchip Technology Inc. Data Sheet Complete DS40002059A-page 85 ATxmega32E5/16E5/8E5 Notes: 1. Maximum numbers are based on characterisation and not tested in production, and valid for 10% to 90% input voltage range. 2. Unless otherwise noted all linearity, offset and gain error numbers are valid under the condition that external VREF is used. Table 36-10. Gain Stage Characteristics DNL(1) Differential non-linearity Differential mode 16ksps, VREF = 3V 1 lsb 16ksps, VREF = 1V 2 300ksps, VREF = 3V 1 300ksps, VREF = 1V 2 Single ended unsigned mode 16ksps, VREF = 3.0V 1 1.5 16ksps, VREF = 1.0V 2 3 Offset Error Differential mode 8 mV Temperature drift 0.01 mV/K Operating voltage drift 0.25 mV/V Gain Error Differential mode External reference -5 mV AVCC/1.6 -5 AVCC/2.0 -6 Bandgap ±10 Temperature drift 0.02 mV/K Operating voltage drift 2 mV/V Gain Error Single ended unsigned mode External reference -8 mV AVCC/1.6 -8 AVCC/2.0 -8 Bandgap ±10 Temperature drift 0.03 mV/K Operating voltage drift 2 mV/V Symbol Parameter Condition Min. Typ. Max. Units Rin Input resistance Switched 4.0 k Csample Input capacitance Switched 4.4 pF Signal range Gain stage output 0 AVCC- 0.6 V Propagation delay ADC conversion rate 1/2 1 3 ClkADC cycles Clock rate Same as ADC 100 1800 kHz Symbol Parameter Condition(2) Min. Typ. Max. Units |
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