MAS3504D datasheet(10/40 Pages) MICRONAS

10 / 40 page

MAS 3504D

Micronas

2.6.3.2. End of DMA Transfer

The above procedure will be repeated until the

MAS 3504D sets the EOD signal to “0”, which indi-

cates that the transfer of one data block has been exe-

cuted. Subsequently, the controller should set PR to

“0”, wait until EOD rises again, and then repeat the

procedure ((see Section 2.6.3.1. on page 9)) to send

the next block of data. The DMA buffer is 10 bytes long

(one frame).

The recommended PIO DMA conditions and the char-

acteristics of the PIO timing are given in Table 2–2.

2.6.4. Audio Input Interface (SDI)

The A/D interface is a standard I2S interface (16/32 bit,

stereo). This input is used for G.729 recording mode

and must be slaved to the D/A output clock and word-

strobe signals.

The interface is configurable by software to work in dif-

ferent modes. It is possible to choose:

– inverted or non inverted word strobe (SOI),

– no delay or delay of data related to word strobe

– inverted or non inverted I2S-Clock (SOC).

For further details see Section 3.5.4. on page 18

2.6.5. Audio Output Interface (SDO)

The audio output interface of the MAS 3504D is a

standard I2S interface. As the G.729 standard is only

working on mono signals, the same signal is written to

both output channels (left and right).

The interface is configurable by software to work in dif-

ferent modes. It is possible to choose:

– 16 or 32 bit/sample modes,

– inverted or non inverted word strobe (SOI),

– no delay or delay of data related to word strobe

– inverted or non inverted I2S-clock (SOC).

For further details see Section 3.5.4. on page 18

Table 2–2: PIO DMA Timing

Symbol

PIO Pin

Min.

Max.

Unit

tst

PR, EOD

0.010

2000

µs

PR, RTR

160

tpd

PR,

PI[19:12]

120

480

tset

PI[19:12]

160

no limit

PI[19:12]

160

no limit

trtrq

RTR

200

30000

tpr

480

no limit

trpr

PR, RTR

no limit

teod

PR, EOD

160

teodq

EOD

2.5

500

µs

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