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HMC8364LP6GETR Datasheet(PDF) 15 Page - Analog Devices |
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HMC8364LP6GETR Datasheet(HTML) 15 Page - Analog Devices |
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15 / 17 page ![]() Data Sheet HMC8364 Rev. A | Page 15 of 17 THEORY OF OPERATION The HMC8364 consists of four, fundamental VCOs with overlapping frequency ranges to ensure continuous frequency coverage from 18.10 GHz to 26.60 GHz over all conditions. Using four oscillators instead of a single oscillator to span the frequency range reduces the percent bandwidth and tuning sensitivity of each oscillator, improving phase noise performance. Tuning sensitivity flatness across the frequency range is also improved and simplifies the loop filter design in synthesizer applications. The tuning sensitivity is similar across the four VCO cores, which means that the loop bandwidth and phase margin of the loop filter vary less overall vs. a single oscillator solution. The four oscillators share a common tuning port, which means that even though the active devices in unused VCO cores are not biased, the resonant tanks of all four VCO cores are in parallel and tuned simultaneously. A single buffer amplifier is also shared by all four VCOs. The upper circuitry of the buffer amplifier is biased by VCB (Pin 8). The lower portion of the cascode buffer amplifier remains off and very little current flows until one of the VCO cores is enabled. The lower circuitry of the amplifier is enabled when the RF signal of any one of the four VCOs arrives at its input. If VCB is biased and any VCO core is enabled, current flows through the buffer amplifier and the RF signal propagates to RFOUT (Pin 5). The buffer amplifier is designed to support only one VCO at a time. Avoid enabling more than one oscillator at a time because multiple oscillators stress the buffer amplifier enough to reduce its long-term operating life. |
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