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TMS320F28075PZP Datasheet(PDF) 73 Page - Texas Instruments |
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TMS320F28075PZP Datasheet(HTML) 73 Page - Texas Instruments |
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73 / 192 page ![]() NO.(1) (2) (3) PARAMETER MIN MAX UNIT 9 th(EMOEH-EMAIV) Output hold time, EMxOE high to EMxA[y:0] invalid (RH)*E–3 (RH)*E ns 10 tw(EMOEL) EMxOE active low width (EW = 0) (RST)*E–1 (RST)*E+1 ns EMxOE active low width (EW = 1) (RST+(EWC*16))*E–1 (RST+(EWC*16))*E+1 ns 11 td(EMWAITH-EMOEH) Delay time from EMxWAIT deasserted to EMxOE high 4E+10 5E+15 ns 29 tsu(EMDQMV-EMOEL) Output setup time, EMxDQM[y:0] valid to EMxOE low (RS)*E–3 (RS)*E+2 ns 30 th(EMOEH-EMDQMIV) Output hold time, EMxOE high to EMxDQM[y:0] invalid (RH)*E–3 (RH)*E ns Writes 15 tc(EMWCYCLE) EMIF write cycle time (EW = 0) (WS+WST+WH)*E–3 (WS+WST+WH)*E+1 ns EMIF write cycle time (EW = 1) (WS+WST+WH+ (EWC*16))*E–3 (WS+WST+WH+ (EWC*16))*E+1 ns 16 tsu(EMCEL-EMWEL) Output setup time, EMxCS[y:2] low to EMxWE low (SS = 0) (WS)*E–3 (WS)*E+1 ns Output setup time, EMxCS[y:2] low to EMxWE low (SS = 1) –3 1 ns 17 th(EMWEH-EMCEH) Output hold time, EMxWE high to EMxCS[y:2] high (SS = 0) (WH)*E–3 (WH)*E ns Output hold time, EMxWE high to EMxCS[y:2] high (SS = 1) –3 0 ns 18 tsu(EMDQMV-EMWEL) Output setup time, EMxDQM[y:0] valid to EMxWE low (WS)*E–3 (WS)*E+1 ns 19 th(EMWEH-EMDQMIV) Output hold time, EMxWE high to EMxDQM[y:0] invalid (WH)*E–3 (WH)*E ns 20 tsu(EMBAV-EMWEL) Output setup time, EMxBA[y:0] valid to EMxWE low (WS)*E–3 (WS)*E+1 ns 21 th(EMWEH-EMBAIV) Output hold time, EMxWE high to EMxBA[y:0] invalid (WH)*E–3 (WH)*E ns 22 tsu(EMAV-EMWEL) Output setup time, EMxA[y:0] valid to EMxWE low (WS)*E–3 (WS)*E+1 ns 23 th(EMWEH-EMAIV) Output hold time, EMxWE high to EMxA[y:0] invalid (WH)*E–3 (WH)*E ns 24 tw(EMWEL) EMxWE active low width (EW = 0) (WST)*E–1 (WST)*E+1 ns EMxWE active low width (EW = 1) (WST+(EWC*16))*E–1 (WST+(EWC*16))*E+1 ns 25 td(EMWAITH-EMWEH) Delay time from EMxWAIT deasserted to EMxWE high 4E+10 5E+15 ns 26 tsu(EMDV-EMWEL) Output setup time, EMxD[y:0] valid to EMxWE low (WS)*E–3 (WS)*E+1 ns 27 th(EMWEH-EMDIV) Output hold time, EMxWE high to EMxD[y:0] invalid (WH)*E–3 (WH)*E ns (1) TA = Turn around, RS = Read setup, RST = Read strobe, RH = Read hold, WS = Write setup, WST = Write strobe, WH = Write hold, MEWC = Maximum external wait cycles. These parameters are programmed through the Asynchronous Bank and Asynchronous Wait Cycle Configuration Registers. These support the following ranges of values: TA[4–1], RS[16–1], RST[64–4], RH[8–1], WS[16–1], WST[64–1], WH[8–1], and MEWC[1–256]. See the TMS320F2807x Microcontrollers Technical Reference Manual for more information. (2) E = EMxCLK period in ns. (3) EWC = external wait cycles determined by EMxWAIT input signal. EWC supports the following range of values. EWC[256–1]. The maximum wait time before time-out is specified by bit field MEWC in the Asynchronous Wait Cycle Configuration Register. See the TMS320F2807x Microcontrollers Technical Reference Manual for more information. www.ti.com TMS320F28076, TMS320F28075 SPRS902J – OCTOBER 2014 – REVISED FEBRUARY 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 73 Product Folder Links: TMS320F28076 TMS320F28075 |
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