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F280041PMS Datasheet(PDF) 39 Page - Texas Instruments |
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F280041PMS Datasheet(HTML) 39 Page - Texas Instruments |
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39 / 230 page  6.4 Pin Multiplexing 6.4.1 GPIO Muxed Pins Table 1-1 lists the GPIO muxed pins. The default mode for each GPIO pin is the GPIO function, except GPIO35 and GPIO37, which default to TDI and TDO, respectively. Secondary functions can be selected by setting both the GPyGMUXn.GPIOz and GPyMUXn.GPIOz register bits. The GPyGMUXn register should be configured before the GPyMUXn to avoid transient pulses on GPIOs from alternate mux selections. Columns that are not shown and blank cells are reserved GPIO Mux settings. Note GPIO20, GPIO21, and GPIO41 to GPIO55 are not available on any packages. Boot ROM enables pullups on these pins. For more details, see Section 6.5. Table 6-6. GPIO Muxed Pins 0, 4, 8, 12 1 2 3 5 6 7 9 10 11 13 14 15 GPIO0 EPWM1_A I2CA_SDA GPIO1 EPWM1_B I2CA_SCL GPIO2 EPWM2_A OUTPUTXB AR1 PMBUSA_S DA SCIA_TX FSIRXA_D1 GPIO3 EPWM2_B OUTPUTXB AR2 OUTPUTXB AR2 PMBUSA_S CL SPIA_CLK SCIA_RX FSIRXA_D0 GPIO4 EPWM3_A OUTPUTXB AR3 CANA_TX FSIRXA_CL K GPIO5 EPWM3_B OUTPUTXB AR3 CANA_RX SPIA_STE FSITXA_D1 GPIO6 EPWM4_A OUTPUTXB AR4 SYNCOUT EQEP1_A CANB_TX SPIB_SOMI FSITXA_D0 GPIO7 EPWM4_B OUTPUTXB AR5 EQEP1_B CANB_RX SPIB_SIMO FSITXA_CL K GPIO8 EPWM5_A CANB_TX ADCSOCA O EQEP1_ST ROBE SCIA_TX SPIA_SIMO I2CA_SCL FSITXA_D1 GPIO9 EPWM5_B SCIB_TX OUTPUTXB AR6 EQEP1_IND EX SCIA_RX SPIA_CLK FSITXA_D0 GPIO10 EPWM6_A CANB_RX ADCSOCB O EQEP1_A SCIB_TX SPIA_SOMI I2CA_SDA FSITXA_CL K GPIO11 EPWM6_B SCIB_RX OUTPUTXB AR7 EQEP1_B SCIB_RX SPIA_STE FSIRXA_D1 GPIO12 EPWM7_A CANB_TX EQEP1_ST ROBE SCIB_TX PMBUSA_C TL FSIRXA_D0 GPIO13 EPWM7_B CANB_RX EQEP1_IND EX SCIB_RX PMBUSA_A LERT FSIRXA_CL K GPIO14 EPWM8_A SCIB_TX OUTPUTXB AR3 PMBUSA_S DA SPIB_CLK EQEP2_A GPIO15 EPWM8_B SCIB_RX OUTPUTXB AR4 PMBUSA_S CL SPIB_STE EQEP2_B GPIO16 SPIA_SIMO CANB_TX OUTPUTXB AR7 EPWM5_A SCIA_TX SD1_D1 EQEP1_ST ROBE PMBUSA_S CL XCLKOUT GPIO17 SPIA_SOMI CANB_RX OUTPUTXB AR8 EPWM5_B SCIA_RX SD1_C1 EQEP1_IND EX PMBUSA_S DA GPIO18_X2 SPIA_CLK SCIB_TX CANA_RX EPWM6_A I2CA_SCL SD1_D2 EQEP2_A PMBUSA_C TL XCLKOUT GPIO20 GPIO21 GPIO22_VF BSW EQEP1_ST ROBE SCIB_TX SPIB_CLK SD1_D4 LINA_TX GPIO23_VS W GPIO24 OUTPUTXB AR1 EQEP2_A EPWM8_A SPIB_SIMO SD1_D1 PMBUSA_S CL SCIA_TX ERRORSTS GPIO25 OUTPUTXB AR2 EQEP2_B SPIB_SOMI SD1_C1 FSITXA_D1 PMBUSA_S DA SCIA_RX GPIO26 OUTPUTXB AR3 EQEP2_IND EX OUTPUTXB AR3 SPIB_CLK SD1_D2 FSITXA_D0 PMBUSA_C TL I2CA_SDA GPIO27 OUTPUTXB AR4 EQEP2_ST ROBE OUTPUTXB AR4 SPIB_STE SD1_C2 FSITXA_CL K PMBUSA_A LERT I2CA_SCL www.ti.com TMS320F280049, TMS320F280049C, TMS320F280048, TMS320F280048C, TMS320F280045, TMS320F280041, TMS320F280041C, TMS320F280040, TMS320F280040C SPRS945F – JANUARY 2017 – REVISED FEBRUARY 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 39 Product Folder Links: TMS320F280049 TMS320F280049C TMS320F280048 TMS320F280048C TMS320F280045 TMS320F280041 TMS320F280041C TMS320F280040 TMS320F280040C |
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