F280041PMS datasheet(5/230 Pages) TI

5 / 230 page

3.1 Functional Block Diagram

Functional Block Diagram shows the CPU system and associated peripherals.

40x GPIO

3x 12-Bit ADC

16x ePWM Chan.

(16 Hi-Res Capable)

7x eCAP

(2 HRCAP Capable)

2x eQEP

(CW/CCW Support)

4x SD Filters

1x I2C

7x CMPSS

2x Buffered DAC

7x PGA

1x PMBUS

2x SPI

LS0–LS7 RAM

16KW (32KB)

GS0–GS3 RAM

32KW (64KB)

2x SCI

2x CAN

Flash Bank0

16 Sectors

64KW (128KB)

Flash Bank1

16 Sectors

64KW (128KB)

CLA to CPU

MSG RAM

CPU to CLA

MSG RAM

PF1

PF3

PF4

PF2

PF9

PF7

Result

Data

1x FSI RX

1x FSI TX

NMI

Watchdog

Windowed

Watchdog

1x LIN

PF8

M0–M1 RAM

2KW (4KB)

CLA Program ROM

CLA Data ROM

CPU Timers

ERAD

DCSM

ePIE

C28x CPU

FPU32

TMU

VCU-I

Secure ROM

Boot ROM

CLA

(Type 2)

DMA

6 Channels

Crystal Oscillator

INTOSC1, INTOSC2

PLL

Input XBAR

Output XBAR

ePWM XBAR

Figure 3-1. Functional Block Diagram

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TMS320F280049, TMS320F280049C, TMS320F280048, TMS320F280048C, TMS320F280045,

TMS320F280041, TMS320F280041C, TMS320F280040, TMS320F280040C

SPRS945F – JANUARY 2017 – REVISED FEBRUARY 2021

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F280041PMS Datasheet(PDF) 5 Page - Texas Instruments

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