AT90PWM2 datasheet(42/365 Pages) ATMEL

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AT90PWM2/3

4317B–AVR–02/05

• Bit 4 - PRTIM1: Power Reduction Timer/Counter1

Writing a logic one to this bit reduces the consumption of the Timer/Counter1 module.

When the Timer/Counter1 is enabled, operation will continue like before the setting of

this bit.

• Bit 3 - PRTIM0: Power Reduction Timer/Counter0

Writing a logic one to this bit reduces the consumption of the Timer/Counter0 module.

When the Timer/Counter0 is enabled, operation will continue like before the setting of

this bit.

• Bit 2 - PRSPI: Power Reduction Serial Peripheral Interface

Writing a logic one to this bit reduces the consumption of the Serial Peripheral Interface

by stopping the clock to this module. When waking up the SPI again, the SPI should be

re initialized to ensure proper operation.

• Bit 1 - PRUSART0: Power Reduction USART0

Writing a logic one to this bit reduces the consumption of the USART by stopping the

clock to this module. When waking up the USART again, the USART should be re initial-

ized to ensure proper operation.

• Bit 0 - PRADC: Power Reduction ADC

Writing a logic one to this bit reduces the consumption of the ADC by stopping the clock

to this module. The ADC must be disabled before using this function. The analog com-

parator cannot use the ADC input MUX when the clock of ADC is stopped.

Minimizing Power

Consumption

There are several issues to consider when trying to minimize the power consumption in

an AVR controlled system. In general, sleep modes should be used as much as possi-

ble, and the sleep mode should be selected so that as few as possible of the device’s

functions are operating. All functions not needed should be disabled. In particular, the

following modules may need special consideration when trying to achieve the lowest

possible power consumption.

Analog to Digital Converter

If enabled, the ADC will be enabled in all sleep modes. To save power, the ADC should

be disabled before entering any sleep mode. When the ADC is turned off and on again,

the next conversion will be an extended conversion. Refer to “CROSS REFERENCE

REMOVED” for details on ADC operation.

Analog Comparator

When entering Idle mode, the Analog Comparator should be disabled if not used. When

entering ADC Noise Reduction mode, the Analog Comparator should be disabled. In

other sleep modes, the Analog Comparator is automatically disabled. However, if the

Analog Comparator is set up to use the Internal Voltage Reference as input, the Analog

Comparator should be disabled in all sleep modes. Otherwise, the Internal Voltage Ref-

erence will be enabled, independent of sleep mode. Refer to “Analog Comparator” on

page 236 for details on how to configure the Analog Comparator.

AT90PWM2 Datasheet(PDF) 42 Page - ATMEL Corporation

AT90PWM2 Datasheet(HTML) 42 Page - ATMEL Corporation

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