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ATMEGA640 Datasheet(PDF) 38 Page - Microchip Technology |
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ATMEGA640 Datasheet(HTML) 38 Page - Microchip Technology |
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38 / 436 page ![]() 38 ATmega640/V-1280/V-1281/V-2560/V-2561/V [DATASHEET] DS40002211A 9.4.2 XMCRB – External Memory Control Register B • Bit 7– XMBK: External Memory Bus-keeper Enable Writing XMBK to one enables the bus keeper on the AD7:0 lines. When the bus keeper is enabled, AD7:0 will keep the last driven value on the lines even if the XMEM interface has tri-stated the lines. Writing XMBK to zero disables the bus keeper. XMBK is not qualified with SRE, so even if the XMEM interface is disabled, the bus keepers are still activated as long as XMBK is one. • Bit 6:3 – Res: Reserved Bits These bits are reserved and will always read as zero. When writing to this address location, write these bits to zero for compatibility with future devices. • Bit 2:0 – XMM2, XMM1, XMM0: External Memory High Mask When the External Memory is enabled, all Port C pins are default used for the high address byte. If the full 60Kbytes address space is not required to access the External Memory, some, or all, Port C pins can be released for normal Port Pin function as described in Table 9-4. As described in “Using all 64Kbytes Locations of External Memory” on page 32, it is possible to use the XMMn bits to access all 64Kbytes locations of the External Memory. Bit 7 65 4 3 210 (0x75) XMBK – – – – XMM2 XMM1 XMM0 XMCRB Read/Write R/W R R R R R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 Table 9-4. Port C Pins Released as Normal Port Pins when the External Memory is Enabled XMM2 XMM1 XMM0 # Bits for External Memory Address Released Port Pins 0 0 0 8 (Full 56Kbytes space) None 001 7 PC7 010 6 PC7 - PC6 011 5 PC7 - PC5 100 4 PC7 - PC4 101 3 PC7 - PC3 110 2 PC7 - PC2 1 1 1 No Address high bits Full Port C |
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