TPS2398, TPS2399

www.onsemi.com

12

indicating approximately a 1 V droop across the brick input.

Therefore, due to the fast response of the TPS2398/99

devices, the 100

mF capacitor achieves excellent hold−up of

the brick input voltage. Actual requirements depend heavily

on the individual application. Whether the device turns back

on in either current−ramp or current−limit mode depends in

capacitance of the pass FET. But in any case, the circuit turns

back on in a controlled−current manner after rapidly

clamping the potentially damaging spike.

Setting the Sense Resistor Value

Due to the current−limiting action of the internal LCA, the

maximum allowable load current for an implementation is

easily programmed by selecting the appropriate sense

resistor value. The LCA acts to limit the sense voltage

IRAMP pin exceeds approximately 4 V, this limit is the

resistor value can be determined from Equation 1.

R

V

REF_K(MIN)

I

MAX

(eq. 1)

R

33 mV

I

MAX

Where:

When setting the sense resistor value, it is important to

consider two factors, the minimum current that may be

imposed by the TPS2398 or TPS2399, and the maximum

load under normal operation of the module. For the first

factor, the specification minimum clamp value is used, as

seen in Equation 1. This method accounts for the tolerance

in the sourced current limit below the typical level expected

input offset voltage; therefore, this offset does not have to be

factored into the current limit again.) Second, if the load

current varies over a range of values under normal operating

conditions, then the maximum load level must be allowed

load is a switching converter, or brick, which draws higher

input current, for a given power output, when the

distribution bus is at the low end of its operating range, with

decreasing draw at higher supply voltages. To avoid

current−limit operation under normal loading, some margin

should be designed in between this maximum anticipated

load

and

the

minimum

current

limit

level,

or

For example, using a 20 m

W sense resistor for a nominal

1 A load application provides a minimum of 650 mA of

overhead for load variance/margin. Typical bulk capacitor

charging current during turn−on is 2 A (40 mV / 20 m

W).

Setting the Inrush Slew Rate

The

TPS2398

and

TPS2399

devices

enable

user−programming of the maximum current slew rate

during load start−up events. A capacitor tied to the IRAMP

rate. Once the sense resistor value has been established, a

determined from Equation 2.

C

11

100

@ R

di

dt

MAX

(eq. 2)

Where:

di

•

is the desired maximum slew rate, in

amperes/second.

For example, if the desired slew rate for the typical

application shown is 1500 mA/ms, the calculated value for

value of 3.9 nF (as shown in the diagram) provides some

margin for capacitor and sense resistor tolerances.

As described earlier in this section, the TPS2398 and

TPS2399

initiate

ramp

capacitor

charging,

and

consequently, load current di/dt at a reduced rate. This

reduced rate applies until the voltage on the IRAMP pin is

about 0.5 V. The maximum di/dt rate, as set by Equation 2,

is effective once the device has switched to the 10

mA

charging source.

Setting the Fault Timing Capacitor

The fault timeout period is established by the value of the

timeout period permits riding out spurious current glitches

and surges that may occur during operation of the system,

and prevents indefinite sourcing into faulted loads swapped

into a live system. However, to ensure smooth voltage

ramping under all conditions of load capacitance and input

supply potential, the minimum timeout should be set to

accommodate these system variables. To do this, a rough

estimate of the maximum voltage ramp time for a

completely discharged plug−in card provides a good basis

for setting the minimum timer delay.

Due to the three−phase nature of the load current at

turn−on, the load voltage ramp potentially has three distinct

phases (compare Figures 3 and 4). This profile depends on

the relative values of load capacitance, input dc potential,

maximum current limit and other factors. The first two

phases are characterized by the two different slopes of the

current ramp; the third phase, if required for bulk

capacitance charging, is the constant−current charging at

period at an average di/dt simplifies calculation of the

required timing capacitor.